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5
QQ
3 7 63 1515 0
No.
Mark
41
PF0
42
PF1
43
PF2
44
PF3
45
PF4
46
PF5
47
PF6
48
PF7
49
SI2P0/SO2
50
SI2P1/SI2/SB2
51
SI2P2/SCK2
52
SI2P3/SCK20
53
PWM1
54
PWM0
55
VDD2
56
VSS2
57
P00
58
P01
59
P02
60
P03
61
P04
62
P05
63
P06
TE
64
P07
L 13942296513
65
P20/INT4/T1IN
66
P21/INT4/T1IN
67
P22/INT4/T1IN
68
P23/INT4/T1IN
69
P24/INT5/T1IN
70
P25/INT5/T1IN
71
P26/INT5/T1IN
72
P27/INT5/T1IN
73
P30
74
P31
75
P32/UTX1
76
P33/URX1
77
P34/UTX2
78
P35/URX2
79
P36
80
PB7/D7
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6
Pin Name
BUSY
(XFLAGS)
STEST
UTEST
XDSPSS
XDSPRST
DSPMODE
(DATASEL)
(SDATA)
(MDATA)
(SCLK)
TXCE
VDD2
VSS2
EEP_CS
EEP_DO
(PCONFIG1)
EEP_SK
TXCLK
TXODATA
(PCONFIG2)
RDSPOW
RDSDATA
TXIDATA
(DVDACK)
EEP_DI
KEY1
XDARST
XDAPDN
(XDAMUTE)
(USBPOWER)
DIGSEL
SR+TX
SR+RX
SHUTDWN
(XREADY)
XOTW
(XDVDRST)
x
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u163
y
i
6
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8
I/O
For MCACC FUNCTION
I
I
no use
I
Set TESTMODE for Service
I
Set UNITCHECK for checker
O
Slave selection to DSP
O
RESET to DSP
O
Selection of MCACC function
O
no use
O
no use
O
no use
O
no use
O
Chip enable for tuner LSI
O
no use
O
no use
−
−
O
EEPROM CHIP SELECT
O
EEPROM DATA OUT
no use
O
O
EEPROM CLOCK
O
Clock for tuner LSI
O
Data for tuner LSI
O
no use
Q Q
O
Control power supply of RDS (L: POWER ON)
3
6 7
1 3
1 5
I (O) Input RDS data/ non-RDS model = Low output
I
Input data from tuner LSI
O
no use
I
EEPROM DATA IN
I
Key1 input ( PowerOn/Standby key only)
O
RESET for PWM processor IC
O
POWER DOWN for PWM processor IC
O
no use
O
no use
O
DIGITAL INPUT SELECT
O
UART Tx of SR+ function
I
UART Rx of SR+ function
I
SHUTDOWN detection from Power Stage IC
O
no use
I
Over Temperature Warning from Power Stage IC
O
no use
co
.
SX-SW404
7
9 4
2 8
Pin Function
0 5
8
2 9
9 4
2 8
m
7
8
9 9
A
B
C
9 9
D
E
F
75
8
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