JVC GR-D370UC Schematic Diagrams page 14

MAIN(PARAGON) SCHEMATIC DIAGRAM
0 1 MAIN(PARAGON)
HDIN
TO CDS/TG HDIN
VDIN
TO MAIN IF(CN104),
VDIN
CLKI
CDS/TG
CLKI
ADIN9
ADIN9
ADIN8
ADIN8
ADIN7
ADIN7
ADIN6
ADIN6
ADIN5
TO CDS/TG ADIN5
ADIN4
ADIN4
ADIN3
ADIN3
ADIN2
ADIN2
ADIN1
ADIN1
ADIN0
ADIN0
CLK27B
DSYO0
DSYO0
DSYO1
DSYO1
DSYO2
DSYO2
DSYO3
DSYO3
DSYO4
DSYO4
DSYO5
DSYO5
DSYO6
DSYO6
DSYO7
DSYO7
DSCO0
DSCO0
DSCO1
DSCO1
DSCO2
DSCO2
DSCO3
DSCO3
DSCO4
DSCO4
DSCO5
DSCO5
DSCO6
DSCO6
DSCO7
DSCO7
DSYIO0
DSYIO0
TO DSC
DSYIO1
DSYIO1
DSYIO2
DSYIO2
DSYIO3
DSYIO3
DSYIO4
DSYIO4
DSYIO5
DSYIO5
DSYIO6
DSYIO6
DSYIO7
DSYIO7
DSCIO0
DSCIO0
DSCIO1
DSCIO1
DSCIO2
DSCIO2
DSCIO3
DSCIO3
DSCIO4
DSCIO4
DSCIO5
DSCIO5
DSCIO6
DSCIO6
DSCIO7
DSCIO7
HDDSC
HDDSC
VDDSC
VDDSC
FLDDSC
FLDDSC
CLKDSC
CLKDSC
TPB-
TPB+
TO JACK
TPA-
TPA+
TL3012
GND
DAC_RST
TO CPU
DAC_CS
VOI_CLK
TO CPU,VIDEO
VOI_OUT
REC_ADJ
TO PRE/REC
ATF_GAIN
TO VIDEO ASPECT
H_GAIN
H_OFFSET
TO OP DRV
VD_F/Z
VD_F/Z
F/Z_MCK
F/Z_MCK
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-13(No.YF124)
PAL
NTSC
R3078 R3075
OPEN
TVSEL SW 0Ω
C3065
TL3006
TL3005
TL3004
TL3003
TL3002
C3064
0.1
DSYO0
DSYO1
DSYO2
DSYO3
DSYO4
DSYO5
DSYO6
DSYO7
C3062
0.01
DSCO0
DSCO1 C3063
DSCO2
DSCO3
DSCO4
DSCO5
DSCO6
DSCO7
DSYIO0
DSYIO1
DSYIO2
DSYIO3
DSYIO4
DSYIO5
DSYIO6
DSYIO7
DSCIO0
DSCIO1
DSCIO2
DSCIO3
DSCIO4
DSCIO5
DSCIO6
DSCIO7
HDDSC
VDDSC
FLDDSC
CLKDSC
OPEN
C3061
C3060
R3037 56 _0.5% 270p
CH
R3036 56
_0.5%
R3035 56 _0.5% R3038 5.1k _0.5%
R3034 56 _0.5%
16 15 14 13 12 11 10 9
IC3004
BH2226FV-X
L3013
10µ
1 2 3 4 5 6 7 8
C3078
1
313
VSS
230
ADD_VDDL
145
VSS
311 OJSEL
312 CCDSEL
234 TVSEL
314
PLLSEL
235 CLK27SEL
318 CPUBUSTYPE
236 VCC
2 VPD
20 PBI
TL3007
R3096
10k 148 PWR1
R3097 10k 316 PWR2
R3098 10k 53 PWR3
149 TTST
55 TBST
315 FRRES
0.01 237 VCC
54 ADD_VDDL
150 ADD_VSS
238 VCC
317 MTEST
56 TCK
239 TMS
152 TRST
240 TDI
57 TDO
153 VCC
320 ADD_VSS
319 ADD_VDDE
151 CLK24O
154 VCC
58 DSYO0
241 DSYO1
59 DSYO2
242 DSYO3
155 DSYO4
60 DSYO5
321 DSYO6
322 DSYO7
243 VCC
156 ADD_VSS
61 ADD_VDDE
244 DSCO0
157 DSCO1
0.01 324 DSCO2
323 DSCO3
62 DSCO4
245 DSCO5
158 DSCO6
63 DSCO7
64 ADD_VDDL
159 ADD_VSS
246 ADD_VDDE
65 DSYIO0
325 DSYIO1
328 DSYIO2
160 DSYIO3
247 DSYIO4
66 DSYIO5
161 DSYIO6
248 DSYIO7
327 ADD_VSS
67 ADD_VDDE
326 DSCIO0
162 DSCIO1
249 DSCIO2
68 DSCIO3
163 DSCIO4
250 DSCIO5
69 DSCIO6
329 DSCIO7
R3081 10 171 HDDSC
335 VDDSC
R3082 10
R3083 257 FLDDSC
10
R3084 10 78 CLKDSC
332 ADD_VDDE
164 ADD_VSS
252 ADD_VDDL
251 PHYAVS2
165 PHYAVD2
R3040 70 PHYTPB
2.4k 71 PHYXTPB
166 PHYRO
330 PHYAVD3
253 PHYAVS3
331 PHYTPBIAS
C3059
1
ADD
ADD
AD
ADD
ADD
PWM
AD
ADD
IC3001
JCY0205-3
CPUWAITLOGIC D3004
R3090 0
EC2C01C-TR-X
L3012
C3053
2.7µ R3104
R3029
1000p
18k
220k
C3051
82p
5
Q3003
R3030 HN1B01FU/G/-X
10k
R3105
10k
R3031
C3052
OPEN
0.1
AD
AD
AD
A
O
AD
VC
V
AD
VC
V
AD
O
P
P
P
P
V
P
P
LP
P
P
P
P
LP
P
P
D
DA
D
DA
D
DA
D
DA
A
A
A
A
A
A
A
A
(N