Pioneer VSX-D511-K Service Manual page 72

Audio/video multi-channel receiver
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1
7 AK4382AVT (DD & INPUT ASSY : IC9102)
A
• D/A Converter IC
7
Block Diagram
6
CSN
B
7
CCLK
8
CDTI
4
LRCK
2
BICK
SDTI
3
C
7
Pin Function
Pin Name
No.
1
MCLK
D
2
BICK
3
SDTI
4
LRCK
5
PDN
6
CSN
7
CCLK
8
CDTI
9
AOUTR-
E
10
AOUTR+
11
AOUTL -
12
AOUTL+
13
VSS
14
VDD
15
DZFR
16
DZFL
Note: All input pins should not be left floating.
F
72
1
2
De-emphasis
µP
Control
Interface
8X
Interpolator
Audio
Data
Interface
8X
Interpolator
PDN
5
Pin / Function
I/O
Function
I
Master Clock Input Pin
An external TTL clock should be input on this pin.
I
Audio Serial Data Clock Pin
I
Audio Serial Data Input Pin
I
L/R Clock Pin
I
Power - Down Mode Pin
When at ì Lî , the AK4382 is in the power - down mode and is held in reset.
The AK4382 should always be reset upon power- up.
I
Chip Select Pin
I
Control Data Input Pin
I
Control Data Input Pin
O
Rch Negative Analog Output Pin
O
Rch Positive Analog Output Pin
O
Lch Negative Analog Output Pin
O
Lch Positive Analog Output Pin
-
Ground Pin
-
Power Supply Pin
O
Rch Data Zero Input Detect Pin
O
Lch Data Zero Input Det ect Pin
VSX-D511-K
2
3
1
MCLK
Clock
Divider
∆Σ
SCF
Modulator
∆Σ
SCF
Modulator
3
4
14
VDD
VSS
13
DZFL
16
DZFR
15
AOUTL+
12
AOUTL-
11
AOUTR+
10
AOUTR-
9
4

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