NEC VT440 Service Manual page 80

Signal Processor Block
1. PLL block
The PLL block is incorporated in the A/D converter (IC3401). In the PLL block, the dot clock signal is generated
in synchronization with the horizontal sync signal input. This clock signal is fed to the ENDEAVOR (IC3502).
2. ENDEAVOR (IC3502)
The ENDEAVOR (IC3502) is an LSI used as the center of video signal processing. The video signal (8 bits x 3)
digitized at the A/D converter is entered in the ENDEAVOR, where frequency conversion, definition conversion,
ON-screen signal mixing, V-T compensation, etc., are carried out. The resultant signal is output to the G/A, UNI2
(IC3601), for the color irregularity compensation.
These ENDEAVOR functions are used with the aid of the frame memory composed of the built-in SDRAM.
3. CPU block
The CPU block is composed of the CPU (IC3205), SRAM x 4 (IC3201-3204), 4M FLASH ROM (IC3207), 8M
FLASH ROM x 2 (IC3208-3209), and the YAMAG (IC3301). This block is used for various projector controls.
The booting programs and various data are accommodated in the 4M FLASH ROM, while the main programs
are accommodated in the 8M FLASH ROM.
4. YAMAG (IC3301)
The YAMAG (IC3301) incorporates the various functions as specified below.
Generation of the address decode and chip select signals
Frequency measurement and interlace discrimination circuit
I/O port (3 x 8 bits)
Beat cancel circuit (Frequency divider circuit, phase comparison, random generation)
2 → 1 sync signal and clamp pulse changeover and sync width variable circuit
Fan rpm control circuit (2 systems of PWM)
Remote control decode, key, external control mixing, and interrupt generator circuit
Timing signal generator circuit for the LC panel
5. UNI2 (IC3601)
The UNI2 is the color irregularity compensation IC for the 10-bit input - 10-bit output. The color irregularity
compensation data of 25 x 20 = 500 points are accommodated in the screen. By these compensation data and
linear interpolation, compensation for the color irregularity is carried out in the screen.
CIRCUIT DESCRIPTION
6-7