Chapter 3. Block Diagram - Sony VAIO PCG-R505TE Service Manual

Copper mine
Copper mine
Processor Core with 256/
Processor Core with 256/
128KB L2 Cache
128KB L2 Cache
µ BGA2
BGA2
CPU Local Bus
Disp lay
Display
Cash
Cash
Graphics & Memory
Graphics & Memory
CONTROLLER
CONTROLLER
HUB
USB HUB
USB0
GMC H2-m
GMCH2-m
CONN
Bus #0 Dev #0, 1,2
RJ11 RJ11
i.LINK
i.LINK0
USB3
IO Control Hub
IO Control Hub
ICH2-m
ICH2-m
Memory
MS USB2
Memory
Stick
CONN
Stick Bus #0 Dev #8,31
Mod ule
Mod ule
Internal
Cable( Primary IDE)
HDD
USB1
USB1
USB
CONN
SMB2
EEPROM
EEPROM
For Password
FWH
FWH
(Flash BIO S ROM)
(Flash BIOS ROM)
RJ45
LAN-A0 LAN
DC in LAN-A1
DC-IN POWER
CONN
SUPPLY
&
CHARGE
BATTERY
R
CHAPTER 3.
BLOCK DIAGRAM
Refer to Clock Generator
100MHz Memory Bus
On Board
Memory
ROW#2 ,3
ROW#0 ,1
PCI BUS(3 .3V)
Et her
Ether
PHY
PHY
EEPROM
PCI-1394
EEPROM
For LAN PCI-1394
TI
TI
TSB43LV22
LAN TSB43LV22
Bus #1 Dev #8
LPC
AC LINK
Super I/O
Super I/O
SMsC
SMsC
LPC47N227
Audio
LPC47N227
Audio
AD1881A
AD1881A
Parallele
MDC
MDC
(Modem Da ughter
(Modem Da u ghter
Card)
FDD
Card)
Mod ule
Mod ule AMP
PHONE MIC Speaker
RJ11
OUT IN L&R
3-1
CLKGEN
SMBUS
IMI
C9835
INVERTER
Block Diagram
LCD CONN
SO-DIMM
VCH
VCH
Cable
DVO(3.3V)
CardBus/16b itCard
EEPROM
CARDBUS
EEPROM
For i.LINK CARDBUS
RICOH
i.LINK0 RICOH
RC5C475II
RC5C475II
i.LINK1
Bus #1 Dev # 12
I/O Exp ander
I/O Exp ander
H8S/2149 & SM BUS MUX
H8S/2149 & SM BUS MUX
KBC/EC
KBC/EC
SPIC
SPIC
LID ATF
Seri al
JOG
SWX- 72 JOG
Contro ller
Bo ard Contro ller
Membr ane
JOG
TouchP ad
KeyBoard
Docking S tation
12 XGA
LCD &
SONY
DC in
VGA DB-15
FDD
LAN-A1
PC Card
Connector
1 Slot
Seri al
Paral lele
FAN
BATTERY
USB3
USB1
i.LINK
i.LINK
i.LINK1 PHY &
PHY &
ATAPI
ATAPI
Bridge
Bridge
is can not connect on main unit
when connected docking stataion
3-2 PCG-R505TE/R505TEK/R505TS/R505TSK (UC)
(END)
DC-IN
CONN
VGA DB-15
FDD x1
RJ45
Serialx1
Printerx1
USB(A) CONN x1
USB(B) CONN x1
i.LINK
CD-ROM/
RW/DVD
1/1
Confidential