Philips EM7U LCOS Service Manual page 58

Liquid crystal on silicon rear projection tv
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OSD AND OUTPUT CIRCUIT (Figure 50)
The SCR_RED, SCR_GREEN, and SCR_BLUE data is sent to the PLD (Programmed Logic
Device). The PLD inserts the digitized OSD information onto the video information. The sig-
nal from the PLD is output to the TMDS transmitter and then to the Light Engine.
The OSD information from the OTC on the SSB is in an Analog format. This information is
fed to A/D (Analog to Digital) and S/H (Sample and Hold) circuits. These circuits convert the
OSD into four 6-bit data lines before feeding the information to the PLD. As will be shown
later, the PLD is also a slave Processor that communicates with the OTC and the Scaler.
OTC OSD INPUT (Figure 51)
The OSD (On-Screen Display) signals are generated by the OTC (Microprocessor) located on
the SSB. These are Analog RGB signals with a Fast Blanking line. The OSD signals are
sent to the MSB via connector 1401. Sync for the text is generated by the PLD located on
the MSB. This Sync is fed to the OTC via the System Board.
OSD SCALER INPUT (Figure 52)
The OSD and Fast Blanking signals are converted to a digital signal and fed to the PLD
(Programmed Logic Device) to be inserted into the Picture Data. The Red, Green, and Blue
OSD is buffered and fed to two A/D (Analog to Digital) converters, 7193 and 7199. A Data
reference signal, FDB, from the PLD, along with an Upper Reference Voltage and a Lower
Reference Voltage is used to set the voltage level in which sampling will begin and end. The
ADC_CLOCK is used to clock the sampled data out of 7193 and 7199. Data is output on two
6-bit data lines to latches, 7102, 7104, and 7107 before being fed to the PLD. The CLK_RET
line clocks the data out of the Latches.
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