3-3.Block Functions 3-3-1.Overview Of New Technology; 3-3-2.Description Of The Block Functions In The Main Pwb Assy; 3-3-3.Description Of The Functions Of The Dcst Pwb Assy - FujiFilm FinePix30i Service Manual

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3.Schematics
3-3.Block Functions
3-3-1.Overview of New Technology
Basic block functions are almost the same as those of the FinePix1300. Differences in block function from those of the
FinePix1300 are the following one points.
1. The noise of low brightness is decreased without ruining a high luminance resolution by the coring setting according to
brightness by the adoption of new IC (VSC_IC).

3-3-2.Description of the Block Functions in the MAIN PWB ASSY

(1)Description of Camera Circuit Block Functions (CAM BLOCK)
Analog video signals output from CCD (1/2.7", approx. 2.1 million pixels) undergo pseudocolor compensation processing,
applied interpolation processing, amplification, and signal mixing in the SCS3A_IC (IC102: CSP_IC), and thereafter are
converted to 12-bit digital signals. The converted digital signals are sent to the single-chip VCS_IC (IC208: CSP_IC).
(CSP_IC=Chip Size Package IC)
(2)Description of the Image Signal Processing Block (PROCESS BLOCK)
Input Data from the CCD
* The 12-bit digital image data (a portion equivalent to 1 H) output from the camera block (CAM BLOCK) is sent to the VCS_IC,
buffer processing is performed in the [Buffer] of this IC, and replacement with 32-bit (16-bit x 2) data is performed. The
replaced 32-bit image data passed through the [DMA Local Bus] in the VCS_IC, then is stored in the SDRAM_IC
(IC210:8Mbyte). Image data equivalent to one frame (1,600pixels x 1200lines) is temporarily stored in the SDRAM_IC.
* At the same time, the AE is added in the [AUTO operation] utilizing the 12-bit image data input to the VCS_IC, and required
data for AE and AWB are sent to the SDRAM_IC. The SDRAM_IC, serial data transfer to the SCS3A_IC is performed so that
the appropriate AE and AWB are obtained.
* At the same time, the AE is added in the [AUTO operation] utilizing the 12-bit image data input to the VCS_IC, and required
data for AE and AWB are sent to the SDRAM_IC. The SDRAM_IC, serial data transfer to the SCS3A_IC is performed so that
the appropriate AE and AWB are obtained.
Processing for recording to the SSFDC
The image data stored in the SDRAM_IC is converted from 32-bit data to 12-bit data by the [Buffer] in the VCS_IC, and sent
to the [Process]. In this [Process], the 12-bit image data is converted to respective 8-bit Y and C signals, and the image data
is again sent to the [Buffer]. In the [Buffer], the respective 8-bit Y and C signals are converted to respective 8-bit Y, Y, Cb,
and Cr signals, and are sent to the SDRAM_IC. The image data stored in the SDRAM_IC is compressed by the [JPEG
operation] in the VCS_IC, and is again stored in the SDRAM_IC. The compressed image data is sequentially recorded, via
the [Media control] in the VCS_IC, to the SSFDC.
Playback of Images from the SSFDC
Compressed image data from the SSFDC is sent to the VCS_IC, and is stored, via the [Media control], in the SDRAM_IC.
The compressed image data stored in the SDRAM_IC is expanded by the [JPEG operation], and is again stored in the
SDRAM_IC. The image data after expansion is sent via the [Buffer] to the [Process]. In the [Process], the gain control and
the aperture are processed to the Y and C signals. The image data is sent to SDRAM_IC again. The picture data is dis-
played through [Encorder] -> [D/A converter].
During Movie Imaging Mode
The 12-bit image data from the camera block (CAM BLOCK) passes from the [Buffer] to the [Process] in the VCS_IC. In the
[Process], the 12-bit image data is converted to respective 8-bit Y and C signals, and is sent to the SDRAM_IC. The image
data stored in the SDRAM_IC is compressed by the [JPEG operation] in the VCS_IC, and is again stored in the SDRAM_IC.
The image data after compression is sequentially recorded, via the [Media control] in the VCS_IC, to the SSFDC.
Camera-related adjustment data is stored in the FLASH ROM (IC213:CSP_IC).
(3)Description of LCD Control Block Functions (SUB DC/DC BLOCK)
The Y and C signals processed in the image signal-processing VCS_IC is output to the LCD panel via [LCD control].
The liquid crystal monitor is D-TFD (1.8" type; 72,000 pixels).

3-3-3.Description of the Functions of the DCST PWB ASSY

The power-supply circuit provided on the MAIN circuit board generates power supplies of -8V/15.5V (CCD drive), 1.5V
(VCS_IC), 3.3V (SCS3A_IC, VCS_IC, SDRAM_IC, ROM_IC, LED's, and keys), 5.4V (lens drive, flash, and LCD backlight),
5V (LCD schematic), and so on.
16
FinePix30i(U/E/EG) SERVICE MANUAL

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