Icom IC-9100 Service Manual page 26

• MAIN CPU (MAIN UNIT: IC1201)
Pin Line
No. Name
VBUS connection detect for USB HUB.
3 VBUS
H=USB connection detected.
MIC signal detect.
8 DAVOX
H=Input detect.
9 CTFL CW TX status.
RTTY keying input.
11 RTKI
H="Space" input.
PLL (ADF4630) unlock detect.
12 UNLK
L=Unlock detected.
Optional UT-121 installation detect.
13 DVOPT
H=Installed.
Squelch level input. (MAIN BAND)
14 VSQM
H=Squelch open.
Squelch level input. (SUB BAND)
15 VSQS
H=Squelch open.
16 RTDM RTTY decode data from the DSP. (MAIN BAND)
17 RTDS RTTY decode data from the DSP. (SUB BAND)
19, MHSK0, Handshake signal from the DSP. (MAIN
20 MHSK1 BAND)
21, SHSK0, Handshake signal from the DSP. (SUB
22 SHSK1 BAND)
23 FRES Front CPU reset signal.
O p t i o n a l I F f i l t e r ( b a n d w i d t h = 6 k H z )
26 HIFOP1K installation detect.
L=Installed.
O p t i o n a l I F f i l t e r ( b a n d w i d t h = 3 k H z )
27 HIFOP2K installation detect.
L=Installed.
28 DVMTXCK TX clock to CMX589 modem.
29 DVMTXDT TX data to the CMX589 modem.
30 DVMRXCK RX clock to the CMX589 modem.
31 DVMRXDT RX clock from the CMX589 modem.
33 UDTXD Data output port for [USB] connector.
Transceiver power ON/OFF control.
35 PWRS
H=Power ON.
USB HUB power control.
36 UPWS
H=USB power ON.
Dual-port SRAM chip select signal.
37 H8_CS6#
L=Selected.
Expander chip select signal.
38 H8_CS7#
L=Selected.
42 PCK PLL serial clock.
43 PDAT PLL serial data.
44 PSL PLL strobe.
45 PST PLL strobe output.
Straight key/electronic keyer input. (A/D)
46 SKYS
L=Key down.
External SEND reray output.
47 EXRL
H=Relay ON
External tuner "START" signal output.
48 ESTA
L=Tuning start.
External tuner "KEY" signal input.
49 EKEY
L=While tuning/tune NG.
51 MCK Common serial clock.
52 MDAT Common serial data.
53 TCON External tuner conection detect.
54 CTXD CI-V (UART) output.
CRXD/ CI-V (UART) input/CI-V bus busy input.
55
CBSY L=Data "1" /Busy.
PCK/
56 DDS clock.
CON0
Description I/O
Pin Line
No. Name
56 DSPCK DSP clock.
I
57 DSPR DSP data.
59 UDRXD USB data input.
I
[EXT-SP] (MAIN BAND) connection detect.
60 MSPK
I
H=Connected.
[EXT-SP] (SUB BAND) connection detect.
I
61 SSPK
H=Connected.
63 AMBESTB AMBE strobe to the optional UT-121.
I
65 AMBERES Reset signal to the optional UT-121.
I
66 AMBECLK AMBE clock to the optional UT-121.
67 AMBETXD AMBE serial data to the optional UT-121.
I
68 AMBERXD AMBE serial data from the optional UT-121.
73– H8_D8–
I DSP address bus.
80 H8_D15
I 82 TND QPSK (L) decode data.
O 83 NSQ Noise pulse input. (MAIN BAND)
Microphone PTT input.
I 84 PSENI
H=While transmitting.
85 TRAS SEND signal.
I
(Bus control) "L" write signal.
88 H8_LWR#
O
L=While writing.
(Bus control) "H" write signal.
89 H8_HWR#
O L=While writing.
(Bus control) Read signal.
89 H8_RD#
L=While reading.
O
PTT circuit control.
90 PTRAS
H=While transmitting.
O
CPU reset.
92 RES
O H=Reset.
O
PTT/ACC SEND signal.
94 SENI
H=While transmitting.
I
DSP CW/RTTY keying signal.
O
105 DSKY
L=Key down/space.
O
104 NSQS Noise pulse input. (SUB BAND)
105 DSKY CW/RTTY keying.
O
107 DVC DV CODEC power supply control.
113 MFMTL Tone signals. (MAIN BAND)
O
114 SFMTL Tone signals. (SUB BAND)
115 VOXL VOX level input.
O
116 DPTL "SEND" signal input from the data socket.
O
121 DX1M TX/RX DSP data. (MAIN BAND)
O
122 DX1S TX/RX DSP data. (SUB BAND)
O
Over deviation detect.
123 OVDK
O
L= Over deviation detected.
Internal tuner through signal.
I
124 THRI
H=Tuner through.
125 BEEP Beep audio.
O
126 STON Side tone.
O
Data output (UART) for the communication
133 LTXD
with the front CPU.
I
Data input (UART) for the communication
134 LRXD
with the front CPU.
O
135 PWRK [POWER] input. (Pull-up)
O
137 EDT EEPRROM data.
I
138 ECK EEPRROM clock.
O
Internal tuner "KEY" input (UART).
140 IKEY
L=Tuner ON.
I
142 ISTA Internal tuner "START" signal (UART).
O
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