LG E900 Service Manual page 160

Hide thumbs Also See for E900:
Table of Contents

Advertisement

7. CIRCUIT DIAGRAM
12
11
L
QSD8650
K
J
RTR6285_SSBI
GPS_LNA_EN
BT_RESET_N
RTR_TXIP
C346
2.2n
RTR_TXIM
MSMA_2.1V
RTR_TXQP
0603
RTR_TXQM
RTR_DAC_REF
W_1700_1900_ON
I
W_850_900_ON
WCDMA_2100_ON
RTR_TX_ON
WCDMA_PA_R0
TRK_LO
GSM_PA_RAMP
GSM_PA_DAC_REF
RTR_RXIP
RTR_RXIM
RTR_RXQP
RTR_RXQM
RTR_DRXIP
RTR_DRXIM
RTR_DRXQP
H
RTR_DRXQM
BT_WAKEUP
VREG_MSME_1.8V
WLAN_RESET_N
USBH_DM
0603
C350
0.1u
C353
DNI
5
U332
USBH_DP
1
TCXO_EN
VCC
USB_RBIAS
4
R348
C349
1n
2
33
TCXO_USB_XO
GND
3
R347
0603
100K
AMUX_OUT
G
eMMC_DATA[0]
eMMC_DATA[1]
Place near Pin Y14 (6.34K,1%)
eMMC_DATA[2]
eMMC_DATA[3]
R339
USB_RBIAS
eMMC_DATA[4]
6340
eMMC_DATA[5]
eMMC_DATA[6]
eMMC_DATA[7]
eMMC_CMD
eMMC_CLK
F
E
D
C-CLIP
Shield Can(SMT type, Main Top )
C
MCGY0004201
MCGY0004201
1
1
SC302
SC303
B
A
12
11
Copyright © 2010 LG Electronics. Inc. All right reserved.
Only for training and service purposes
10
9
8
MDDI I/F
GPIO_43_UART1_RFR_N
AA1
GPIO_57_SBST_PRI
GPIO_44_UART1_CTS_N
W2
GPIO_58_SBDT_PRI
GPIO_45_UART1_RX_DATA_A
W3
GPIO_59_SBCK_PRI
VDD_P4(CAMERA)
AG8
RX_VCO_SEL_GPIO_30_A9_ETM_TRAC
GPIO_157_UART2DM_RFR_N
AH6
VHF_VCO_EN_GPIO_23_A9_ETM_TRAC
GPIO_139_UART2DM_RX_DATA
F7
BBR_CKIN_EXT
GPIO_140_UART2DM_TX
T1
I_OUT_P
GPIO_141_UART2DM_CTS_N
T2
I_OUT_N
R1
Q_OUT_P
GPIO_48_UIM1_PWR_ENABLE
R2
Q_OUT_N
T3
DAC_IREF
Y1
GPIO_110_PA_ON2
GPIO_84_UART3_RFR_N
U11
GPIO_83_PA_ON1
GPIO_85_UART3_CTS_N
P9
PA_ON0
GPIO_86_UART3_RX_DATA_A
N5
TX_ON
T11
PA_RANGE0
GPIO_51_SDC1_DATA3
N6
TRK_LO_ADJ
GPIO_52_SDC1_DATA2
N8
TX_AGC_ADJ
GPIO_53_SDC1_DATA1
T8
PA_POWER_CTL
GPIO_54_SDC1_DATA0
T9
PA_POWER_CTL_M
R3
PA_DAC_TST
E1
I_IP_CH0
E2
I_IM_CH0
U251
F1
Q_IP_CH0
GPIO_64_SDC2_DATA3
F2
Q_IM_CH0
GPIO_65_SDC2_DATA2
F5
I_IP_CH1
GPIO_66_SDC2_DATA1
G5
I_IM_CH1
GPIO_67_SDC2_DATA0
G1
Q_IP_CH1
GPIO_68_AUDIO_PCM_DOUT_A
G2
Q_IM_CH1
GPIO_69_AUDIO_PCM_DIN_A
AH7
GPIO_22_A9_ETM_TRACE_PKT13_BT_
GPIO_70_AUDIO_PCM_SYNCIN_A
AH8
GPIO_26_SYNTH_LOCK_BT_IRQ
GPIO_71_AUDIO_PCM_CLKIN_A
U3
TV_DAC_C
U5
REV.B
TVDAC_R_SET
U6
TVDAC_COMPOSIT_Y
A10
USB_DM
A11
USB_DP
GPIO_76_GRFC5_SBST_TX
B12
USB_RBIAS
C10
USB_XO
C11
USB_ID
F10
VCHG_VBUS
USB_VBUS
GPIO_80_GRFC1_SBDT_TX
D1
YM_LR
D3
XM_LL
GPIO_82_DRX_MODE_SELECT_C
Resistivity Touch I/F
F3
YP_UR
GPIO_94_CAM_IF_FOCUS_DIR
E3
XP_UL
TP334
D2
WIPER
C12
AUX_TCK_GPIO_93_SDC3_DATA0
J12
AUX_TRST_GPIO_92_SDC3_DATA1
GPIO_104_VFE_CAMIF_TIMER2
B13
AUX_RTCK_GPIO_91_SDC3_DATA2
GPIO_105_VFE_CAMIF_TIMER1
F13
AUX_TDO_GPIO_90_SDC3_DATA3
F11
GPIO_158_SDC3_DATA4
F12
GPIO_159_SDC3_DATA5
E12
GPIO_160_SDC3_DATA6
A14
GPIO_161_SDC3_DATA7
H11
AUX_TDI_GPIO_89_SDC3_CMD
A13
AUX_TMS_GPIO_88_SDC3_CLK
0603
C352
18p
C336
18p
C334
C335
C358
C337
18p
18p
18p
18p
Array TP
VCHG_VBUS
VBAT
SC301
1
MFEZ0045001
REV.1.0
UART3_RX
UART3_TX
REMOTE_PWR_ON
10
9
8
7
6
5
AD11
BT_UART_RTS
V13
BT_UART_CTS
AG12
BT_UART_RXD
Y13
GPIO_46_UART1_TX
BT_UART_TXD
AH15
3D_INT_N
AF11
TOUCH_INT
AH12
PROX_OUT
AH11
FLASH_SDA
AH18
GPIO_47_UIM1_CLK
MSM_USIM_CLK
AG18
FPGA_SLEEP_N
REV. C
NAND_FLASH_READY
AF18
GPIO_49_UIM1_RESET
MSM_USIM_RST
AC17
MSM_USIM_DATA
GPIO_50_UIM1_DATA
AF12
AA13
AC12
UART3_RX
V17
UART3_TX
GPIO_87_UART3_TX
AA18
AH19
SUB_DET
REV. C
Y18
FPGA_SPI_SI
REV. B
AC18
REV. B
FPGA_SPI_SO
AG19
GPIO_55_SDC1_CMD
FPGA_SPI_SS
REV. B
AA19
GPIO_56_SDC1_CLK
REV. B
FPGA_SPI_SCLK
AH20
GPIO_62_SDC2_CLK
WLAN_CLK
T20
GPIO_63_SDC2_CMD
WLAN_CMD
AF20
WLAN_SDIO[3]
AG20
WLAN_SDIO[2]
U18
WLAN_SDIO[1]
AF19
WLAN_SDIO[0]
Y17
BT_PCM_DOUT
AC13
BT_PCM_DIN
AG13
BT_PCM_SYNC
AC14
BT_PCM_CLK
V3
ANT_SEL3
GPIO_72_GRFC9
AD3
GPIO_73_GRFC8
ANT_SEL2
AD1
ANT_SEL1
GPIO_74_GRFC7
AD2
GPIO_75_GRFC6
ANT_SEL0
AE2
AE1
GPIO_77_GRFC11
PROX_I2C_SDA
AC5
GPIO_78_GRFC3
AF2
GPIO_79_GRFC2
AB5
AC2
GPIO_81_GRFC0
W_LNA_EN
REV.B
Y8
PROX_I2C_SCL
M9
5MCAM_RESET_N
N9
GPIO_95_I2C_SCL
CAM_I2C_SCL_2.6V
CAM_I2C_SCL_2.6V|BUCK_SCL
M8
GPIO_96_I2C_SDA
CAM_I2C_SDA_2.6V
P11
GPIO_97_SBCK_TX
L8
CAM_I2C_SDA_2.6V|BUCK_SDA
REV. B
M11
Y14
CMPS_RESET_N
GPIO_106_TSIF_SYNC
AH13
CAM_I2C_SCL_2.6V
BUCK_SCL
GPIO_107_TSIF_DATA
FLASH_SCL
V14
CAM_I2C_SDA_2.6V
BUCK_SDA
AUDIO_I2C_SDA
GPIO_108_TSIF_EN
AF13
GPIO_109_TSIF_CLK
AUDIO_I2C_SCL
H6
NC_6
T21
NC_7
W9
NC_8
R349
0
QCT Ref.(080925_byte)
C338
18p
Level Shifter form CAM I2C
C348
18p
VREG_MSMP_2.6V
VREG_CAM_DVDD_1.8V
C375
0.1u
C333
C373
18p
0.1u
R355
4.7K
R357
4.7K
U335
4.7K
8
1
4.7K
R356
R358
VCC
VL
0603
0603
7
2
CAM_I2C_SDA_2.6V
IO_VCC1
IO_VL1
CAM_I2C_SDA
6
3
CAM_I2C_SCL_2.6V
IO_VCC2
IO_VL2
CAM_I2C_SCL
5
4
EN
GND
UART331
2.5G
3G
1
GND
GND
2
RX
RX
3
TX
TX
4
NC1
VCHAR
5
ON_SW
ON_SW
6
VBAT
VBAT
7
NC2
PWR
8
OJ333
OJ331
OJ334
OJ335
NC3
URXD
9
NC4
UTXD
10
DSR
11
RTS
12
CTS
7
6
5
- 161 -
4
3
2
NAND 4G / DDR SDRAM 4G ( Hynix)
REV. B
FBGA,137,4G(LB/256Mx16) NAND+4G(DDR400/16Mx4x32*2_2CS_2CKE)
N1
K4
EBI2_DATA[0]
IO0
A0
SDRAM_ADDR0
N2
L1
EBI2_DATA[1]
IO1
A1
SDRAM_ADDR1
N3
L2
EBI2_DATA[2]
IO2
A2
SDRAM_ADDR2
M5
L3
EBI2_DATA[3]
IO3
A3
SDRAM_ADDR3
P7
C2
EBI2_DATA[4]
IO4
A4
SDRAM_ADDR4
M6
D2
VREG_MSME_1.8V
EBI2_DATA[5]
IO5
A5
SDRAM_ADDR5
N6
E1
EBI2_DATA[6]
IO6
A6
SDRAM_ADDR6
M8
D3
EBI2_DATA[7]
IO7
A7
SDRAM_ADDR7
P2
E2
EBI2_DATA[8]
SDRAM_ADDR8
IO8
A8
P3
D4
EBI2_DATA[9]
IO9
A9
SDRAM_ADDR9
N4
K3
EBI2_DATA[10]
SDRAM_ADDR10
IO10
A10
P4
F2
EBI2_DATA[11]
IO11
A11
SDRAM_ADDR11
P5
F1
EBI2_DATA[12]
SDRAM_ADDR12
IO12
A12
N7
M3
EBI2_DATA[13]
IO13
A13
SDRAM_ADDR13
M7
J3
EBI2_DATA[14]
SDRAM_BA0
IO14
BA0
N8
K2
EBI2_DATA[15]
IO15
BA1
SDRAM_BA1
B6
nNAND_FLASH_CS
_CE
B3
L4
nOE2
_RE
DQ0
SDRAM_D0
B7
L5
nWE2
_WEN
DQ1
SDRAM_D1
B4
L6
nUB2
CLE
DQ2
SDRAM_D2
C4
L7
nLB2
ALE
DQ3
SDRAM_D3
C3
K8
nNAND_WP
_WP
DQ4
SDRAM_D4
C6
L8
R_B
DQ5
SDRAM_D5
K7
DQ6
SDRAM_D6
K5
DQ7
SDRAM_D7
B5
K6
VREG_MSME_1.8V
VCCN0
DQ8
SDRAM_D8
N5
G7
VCCN1
DQ9
SDRAM_D9
U333
J6
SDRAM_D10
DQ10
C5
J5
VSSN0
DQ11
SDRAM_D11
P6
H8BES0UU0MCR-4EM
H6
SDRAM_D12
VSSN1
DQ12
H5
DQ13
SDRAM_D13
B8
J4
SDRAM_D14
VREG_MSME_1.8V
VDD0
DQ14
D1
G3
VDD1
DQ15
SDRAM_D15
H1
G4
SDRAM_D16
VDD2
DQ16
H10
F4
VDD3
DQ17
SDRAM_D17
P8
E4
SDRAM_D18
VDD4
DQ18
M1
F5
VDD5
DQ19
SDRAM_D19
H3
DQ20
SDRAM_D20
B9
H4
VSS0
DQ21
SDRAM_D21
C1
E6
VSS1
DQ22
SDRAM_D22
H9
F7
VSS2
DQ23
SDRAM_D23
J1
F6
VSS3
DQ24
SDRAM_D24
P9
D5
VSS4
DQ25
SDRAM_D25
M2
E8
VSS5
DQ26
SDRAM_D26
D6
DQ27
SDRAM_D27
J10
D8
VREG_MSME_1.8V
VDDQ0
DQ28
SDRAM_D28
K9
D7
VDDQ1
DQ29
SDRAM_D29
L9
C8
VDDQ2
DQ30
SDRAM_D30
M10
C7
SDRAM_D31
VDDQ3
DQ31
N9
VDDQ4
C9
J2
nSDRAM_CS
VDDQ5
_CS0
D10
F3
VDDQ6
_CS1
nSDRAM_CS1
2CS ONLY
REV. B
E9
G8
SDRAM_DCLK0
VDDQ7
CK
F10
H8
VDDQ8
_CK
SDRAM_DCLK1
G9
VDDQ9
J9
E3
VSSQ0
CKE0
SDRAM_CKE
K10
B2
VSSQ1
CKE1
SDRAM_CKE1
2CS ONLY
REV. B
L10
K1
VSSQ2
_WED
nSDRAM_WE
M9
G2
VSSQ3
_RAS
nSDRAM_RAS
N10
H2
VSSQ4
_CAS
nSDRAM_CAS
C10
J8
VSSQ5
DQM0
SDRAM_DQM0
D9
G6
VSSQ6
DQM1
SDRAM_DQM1
E10
F8
VSSQ7
DQM2
SDRAM_DQM2
F9
E7
VSSQ8
DQM3
SDRAM_DQM3
G10
VSSQ9
SDRAM_DQS0
SDRAM_DQS1
SDRAM_DQS2
SDRAM_DQS3
TCXO Circuit
VREG_TCXO_2.85V
C341
C340
1n
0.1u
0603
X331
KT3225L19200DCW28RA0
R331
1
3
C332
100p
RTR_TRK_LO_ADJ
VCONT
OUT
TCXO_PM_19.2MHZ
100
2
4
C339
1n
C331
GND
VCC
TCXO_RTR_19.2MHZ
Clesed to TCXO
10n
19.2MHz
TCXO_USB_XO
1.0T
VREG_TCXO_2.85V
GPS D FLIP-FLOP
C371
0.1u
U334
6
1
VCC
D
TRK_LO
5
2
NC
CP
PMIC_TCXO
R354
4
3
RTR_TRK_LO_ADJ
Q
GND
C372
2K
33p
C370
33n
4
3
2
1
L
K
J
I
H
G
F
E
D
C
B
A
1
LGE Internal Use Only

Advertisement

Table of Contents
loading

This manual is also suitable for:

Lg-e900

Table of Contents