Microprocessor Subsytem(Qsd8650) - LG E900 Service Manual

3. TECHNICAL BRIEF

3.8 Microprocessor Subsytem(QSD8650)

• High-performance, low-power Scorpion application processor core running to 1 GHz and yielding 2100 DMIPs
• Fully compliant with ARM v7 architecture
• Scorpion code development on industry standard ARM v7 compiler and debuggers
• 2KB instrustion and 2KB data level 1 cache
• 256-KB level 2 tightly-coupled memory(TCM)
• 14-stage pipeline, dual pipelined with dynamic branch prediction and target address cache with link return
stack
• VeNun (vector numerics) advanced single instruction, multiple data(STMD) unit
• Vector floating point instruction set v
• Multiple on-board QUALCOMM enhanced AXI ports with 8-GB/s target bandwidth
• Supports the ARM and Thumb instruction sets, and Jazelle™ techology to enable direct execution of Java
bytecodes
• Low interrupt latency
• Extensive power management with multiple valtage domains, dynamic frequency, and voltage scaling
combined with fine-grained dynamic clock gating
• QUALCOMM QDSP6 application DSP operating at 600MHz
• Enhanced memory supprt
- Internal stacked 256-Mb DDR memory
-166-MHz bus clock for low-power DDR SDRAM
- Dual-memory buses separating the high-speed memory subsystem (EBI1) from low-speed pcripherals (EBI2)
and flash memory (EBI2)
-1.8-V or 2.6-V memory interface support (excluding EBI1 and SMI)
-NAND flash memory interface (with one NAND) and byrst NOR
-Boot from NAND
• Intemal watchdog and sleep timers
LGE Internal Use Only
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