Power Supply Circuits - Icom IC-F3061S Service Manual

The buffer-amplifi ed VCO output signals from the tunable BPF
(L601−L603, C601−C607) are applied to the PLL IC (IC1,
pin 6). The applied signals are divided at the prescaler and
programmable counter according to the "SSD" signal from the
CPU (IC18, pin 10). The divided signal is phase-compared with
the reference frequency signal from the reference frequency
oscillator (X1), at the phase detector.
The phase difference is output from pin 4 as a pulse type signal
after being passed through the internal charge pump. The output
signal is converted into the DC voltage (lock voltage) by passing
through the loop fi lter (R7, R8, R12, C14, C16, C19). The lock
voltage is applied to the varacter diodes (D1 and D2 of RX
VCO1, D5 and D6 of RX VCO2, D9 and D10 of TX VCO) and
locked to keep the VCO frequency constant.
• PLL CIRCUIT
RX VCO1
Q1, D1, D2
RX VCO2
Q2, D5, D6
Loop 4
filter
11
PLL unlock signal
to the CPU (IC18, pin 73)
5-4 POWER SUPPLY CIRCUITS (MAIN UNIT)
Voltage from the attached battery pack is routed to whole of the circuit in the transceiver via switches and regulators.
Attached optional units,
AF amplifier controller
(FRONT UNIT; Q501, Q502, D508),
etc.
CPU (IC18),
EEPROM (IC19),
etc.
Attached optional units,
D/A converters,
etc.
PLL IC (IC1),
Base band IC (IC5),
etc.
PLL IC (IC1)
Transmitter circuits
Receiver circuits
TX VCO
Q3, D9, D10
Programmable
Charge
pump divider
Divide
Phase
Shift register
ratio
detector
adjustment
Reference
divider
IC9
VREF
VREF
regurator
S5V
S5V
regurator
Q15
Q14
T5V
T5V
regurator
R5V R5V
regurator
Q16
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the VCO oscillating frequency.
Buffer
Q6
Buffer
Q4
Buffer
Q5
PLL IC (IC1)
6
Prescaler
BPF
14
SCK
15
SSD
16
PLST
15.3 MHz
10
reference frequency signal
Power switch
VCC
IC6
CPU5V
CPU5V
regurator
+5V
+5V
regurator
Q12, Q13, Q8
"S5C"
28
"T5C"
26
"R5C"
27
5 - 4
D14
to transmitter circuit
D15
to 1st mixer circuit
PLL control signals from the CPU (IC18)
Q30, Q31
Battery pack
HV
8
(IC18)
CPU
Voltage line
Control signal
X1
15.3 MHz