IBM MiEM78P468L Product Specification page 54

EM78P468N/EM78P468L
8-Bit Microcontroller
Binary Instruction
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
Note: This instruction is applicable to IOC50~IOF0, IOC61~IOCE1.
48 •
Hex
0110 00rr rrrr 06rr
0110 01rr rrrr 06rr
0110 10rr rrrr 06rr
0110 11rr rrrr 06rr
0111 00rr rrrr 07rr
0111 01rr rrrr 07rr
0111 10rr rrrr 07rr
0111 11rr rrrr 07rr
100b bbrr rrrr 0xxx
101b bbrr rrrr 0xxx
110b bbrr rrrr 0xxx
111b bbrr rrrr 0xxx
00kk kkkk kkkk 1kkk
01kk kkkk kkkk 1kkk
1000 kkkk kkkk 18kk
1001 kkkk kkkk 19kk
1010 kkkk kkkk 1Akk
1011 kkkk kkkk 1Bkk
1100 kkkk kkkk 1Ckk
1101 kkkk kkkk 1Dkk
1111 kkkk kkkk 1Fkk
1110 1000 kkkk 1E8k
1110 1001 kkkk 1E9k
Mnemonic Operation
R(n) → A(n-1),
RRCA R
R(0) → C, C → A(7)
R(n) → R(n-1),
RRC R
R(0) → C, C → R(7)
R(n) → A(n+1),
RLCA R
R(7) → C, C → A(0)
R(n) → R(n+1),
RLC R
R(7) → (C), C → (R(0)
R(0-3) → ( A(4-7),
SWAPA R
R(4-7) → ( A(0-3)
R(0-3) → ( R(4-7)
SWAP R
R+1 → A, skip if zero
JZA R
R+1 → R, skip if zero
JZ R
BC R, b 0→ ( R(b)
BS R, b 1→ ( R(b)
JBC R, b if R(b)=0, skip
JBS R, b if R(b)=1, skip
PC+1 → [SP],
CALL k
(Page, k) → (PC)
(Page, k) → (PC)
JMP k
k → A
MOV A, k
A v k → A
OR A, k
A & k → A
AND A, k
A ⊕ k → A
XOR A, k
k → A, [Top of Stack] →
RETL k
PC
k-A → A
SUB A, k
k+A → A
ADD A, k
PAGE k K->R5(6:4)
BANK k K->R4(7:6)
Product Specification (V1.5) 02.15.2007
(This specification is subject to change without further notice)
Status
Affected
C
C
C
C
None
None
None
None
None
None
None
None
None
None
None
Z
Z
Z
None
Z,C,DC
Z,C,DC
None
None