IBM MiEM78P468L Product Specification page 34

EM78P468N/EM78P468L
8-Bit Microcontroller
Address Name Reset Type
Bit Name
Power-on
R5
0x05
/RESET & WDT
(Port 5)
Wake-up from
Pin Change
Bit Name
Power-on
R6
0x06
/RESET & WDT
(Port 6)
Wake-up from
Pin Change
Bit Name
Power-on
R7
0x7
/RESET & WDT
(Port 7)
Wake-up from
Pin Change
Bit Name
Power-on
R8
0x8
/RESET & WDT
(Port 8)
Wake-up from
Pin Change
Bit Name
Power-on
R9
0x9
/RESET & WDT
(LCDCR)
Wake-up from
Pin Change
Bit Name
Power-on
RA
0xA
/RESET & WDT
(LCD_ADDR)
Wake-up from
Pin Change
Bit Name
Power-on
RB
0xB
/RESET & WDT
(LCD_DB)
Wake-up from
Pin Change
Bit Name
Power-on
RC
0xC
/RESET & WDT
(CNTER)
Wake-up from
Pin Change
Bit Name
Power-on
RD
0xD
/RESET & WDT
(SBPCR)
Wake-up from
Pin Change
Bit Name
Power-on
RE
0xE
/RESET & WDT
(IRCR)
Wake-up from
Pin Change
Bit Name
Power-on
RF
0xF
/RESET & WDT
(ISR)
Wake-up from
Pin Change
Bit Name
0x10 Power-on
~ R10~R3F
/RESET & WDT
0x3F
Wake-up from
Pin Change
Note: This bit is equal to the Code Option HLFS bit data
Legend: "×" = not used
"−" = Not defined
"u" = unknown or don't care
28 •
Bit 7 Bit 6 Bit 5
R57 R56 R55
1 1 1
1 1 1
P P P
R67 R66 R65
1 1 1
1 1 1
P P P
R77 R76 R75
1 1 1
1 1 1
P P P
R87 R86 R85
1 1 1
1 1 1
P P P
BS DS1 DS0
1 1 0
1 1 0
P P P
X X X
0 0 0
0 0 0
P P P
X X X
U U U
U U U
U U U
X X X
0 1 0
0 1 0
P P 0
X CLK2 CLK1
U 0 0
U 0 0
U P P
IRE HF LGP
0 0 0
0 0 0
P P P
ICIF LPWTF HPWTF CNT2F
0 0 0
0 0 0
N P P
Bit 7 Bit 6 Bit 5
U U U
P P P
P P P
"P" = previous value before reset
"t" = check R3 register explanation
"N" = Monitors interrupt operation status
(This specification is subject to change without further notice)
Bit 4 Bit 3 Bit 2
R54 X X
1 U U
1 U U
P U U
R64 R63 R62
1 1 1
1 1 1
P P P
R74 R73 R62
1 1 1
1 1 1
P P P
R84 R83 R82
1 1 1
1 1 1
P P P
LCDEN X
LCDTYPE
0 U 0
0 U 0
P U P
LCD_A4 LCD_A3 LCD_A2 LCD_A1 LCD_A0
0 0 0
0 0 0
P P P
X
LCD_D 3 LCD_D 2 LCD_D 1 LCD_D 0
U U U
U P P
U P P
X
LPWTEN HPWTEN CNT2EN CNT1EN
0 0 0
0 0 0
P P P
CLK0 IDLE BF1
0 1 0
0 1 0
P P P
X IROUTE TCCE
U 0 0
U 0 0
U P P
CNT1F INT1F
0 0 0
0 0 0
P P P
Bit 4 Bit 3 Bit 2
U U U
P P P
P P P
Product Specification (V1.5) 02.15.2007
Bit 1 Bit 0
X IOCPAGE
U 0
U 0
U P
R61 R60
1 1
1 1
P P
R71 R70
1 1
1 1
P P
R81 R80
1 1
1 1
P P
LCDF1 LCDF0
0 0
0 0
P P
0 0
0 0
P P
U U
P P
P P
0 0
0 0
P P
BF0 CPUS
0 *1
0 *1
P P
EINT1 EINT0
0 0
0 0
P P
INT0F TCIF
0 0
0 0
P P
Bit 1 Bit 0
U U
P P
P P