HP Kayak XU800 Technical Reference Manual page 69

Although the Setup program can be used to change some of the settings, the
following address map is not completely BIOS dependent, but is determined
partly by the operating system. Note that some of the interrupts are
allocated dynamically.
Interrupt Source
INTA - PCI slot 3 (64/66)
INTB - PCI slot 3 (64/66)
INTC - PCI slot 3 (64/66)
INTD - PCI slot 3 (64/66)
INTA - PCI slot 4 (64/66)
INTB - PCI slot 4 (64/66)
INTC - PCI slot 4 (64/66)
INTD - PCI slot 4 (64/66)
INTA - onboard SCSI controller
AGP - INTA, PCI Slot 1 - INTC, PCI
Slot 2 - INTA, PCI Slot 5 - INTB
PCI Audio - INTA, AGP - INTB, PCI
Slot 1 - INTD, PCI Slot 2 - INTB,
PCI Slot 5 - INTC
BT_INT, PCI Slot 1 - INTA, PCI
Slot 2 - INTC, PCI Slot 5 - INTD
USB - INTA, PCI Slot 1 - INTB, PCI
Slot 2 - INTD, PCI Slot 5 - INTA
Device on Primary IDE Channel
Device on Secondary IDE Channel
Serial Interrupt from Super I/O
1.
In PIC mode, the Interrupts signaled to the P64H are chained as INTC to the ICH.
There are three major interrupt modes available:
PIC mode: This mode uses only the "Legacy" interrupt controllers, so that
only one processor can be supported. Because this system has dual
processor capability, this mode is not chosen by default by Windows NT.
However, during Windows NT installation, you have the possibility of
selecting this mode.
APIC Controller Interrupt Signalling on
of
Input (PIC mode)
device
P64H IRQ0 BT_INT
P64H IRQ1 BT_INT
P64H IRQ2 BT_INT
P64H IRQ3 BT_INT
P64H IRQ4 BT_INT
P64H IRQ5 BT_INT
P64H IRQ6 BT_INT
P64H IRQ7 BT_INT
P64H IRQ8 BT_INT
ICH INTA
ICH INTB
ICH INTC
ICH INTD
ICH IRQ14
ICH IRQ15
ICH SERIRQ
2 System Board
Assigned Device Interrupts
(APIC
1
modes)
APIC bus
APIC bus
APIC bus
APIC bus
APIC bus
APIC bus
APIC bus
APIC bus
APIC bus
INT APIC bus
INT APIC bus
INT APIC bus
INT APIC bus
INT APIC bus
INT APIC bus
INT APIC bus
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