Sony HCD-RV990D Service Manual page 110

HCD-RV660D/RV990D
Pin No. Pin Name
61 VSS
62, 63 HCS0, HCS1
64 VDD
65 DASP
66 to 69 MDB0 to MDB3
70 VSS
71 MDB4
72 VDD5V
73 to 75 MDB5 to MDB7
76 XMWR
77 VDD
78 XRAS
79, 80 MA0, MA1
81 VSS
82 to 87 MA2 to MA7
88 VDD
89 MA8
90 VSS
91 MA9/mnt0
92 MA10/mnt1
93 MA11/mnt2
94 XMOE
95 XCAS
96, 97 MDB8, MDB9
98 VSS
99 MDBA
100 VDD
101, 102 MDBB, MDBC
103 VDD5V
104 to 106 MDBD to MDBF
107 GFS
108 VSS
109 APE0
110 VDD
111 DASY0
112 GNDA5
113, 114 ASF1, ASF2
115 DASY1
116 RFDCC
117 RFIN
118, 119 VCCA5, VCCA4
120 VCOR1
121 VCOIN
122, 123 GNDA4, GNDA3
124 LPF5
125 VC1
126, 127 LPF1, LPF2
128, 129 VCCA3, VCCA2
130 PD0
131 PDHVCC
132 FDO
133, 134 GNDA2, GNDA1
22
I/O
— Ground
I Not used (Open)
— Power supply pin (+3.2 V)
I/O Not used (Fixed at H)
I/O Two-way data bus signal input from/output to 16Mbit D-RAM IC.
— Ground
I/O Two-way data bus signal input from/output to 16Mbit D-RAM IC.
— Power supply pin (+5 V)
I/O Two-way data bus signal input from/output to 16Mbit D-RAM IC.
O Write enable signal output to 16Mbit D-RAM IC.
— Power supply pin (+3.2 V)
O Row address strobe signal output to 16Mbit D-RAM IC.
O Address signal output to 16Mbit D-RAM IC.
— Ground
O Address signal output to 16Mbit D-RAM IC.
— Power supply pin (+3.2 V)
O Address signal output to 16Mbit D-RAM IC.
— Ground
O Address signal output to 16Mbit D-RAM IC.
O EEPROM ready signal output to mechanism control IC.
O Address signal output to 16Mbit D-RAM IC.
O Output enable signal output to 16Mbit D-RAM IC.
O Column address strobe signal output to 16Mbit D-RAM IC.
I/O Two-way data bus signal input from/output to 16Mbit D-RAM IC.
— Ground
I/O Two-way data bus signal input from/output to 16Mbit D-RAM IC.
— Power supply pin (+3.2 V)
I/O Two-way data bus signal input from/output to 16Mbit D-RAM IC.
— Power supply pin (+5 V)
I/O Two-way data bus signal input from/output to 16Mbit D-RAM IC.
O Guard frame sync signal output to mechanism control IC.
— Ground
O Absolute phase error signal output
— Power supply pin (+3.2 V)
O RF binary signal output
— Ground
O Filter connected pin for selection the constant asymmetry compensation.
I Analog signal input after integrated from the RF binary signal.
I Input pin for adjusting DC cut high-pass filter for RF signal.
I RF signal input from RS-232C. (for check)
— Power supply pin (+3.2 V)
I VCO oscillating range setting resistor connected
I VCO input
— Ground
O Inverted signal output to operation amplifier from PLL loop filter.
I Middle point voltage (+1.65 V) input
I Inverted signal input from operation amplifier from PLL loop filter.
— Power supply pin (+3.2 V)
O Signal output to charge pump for phase comparator.
O Middle point voltage output to RF PLL.
O Signal output to charge pump for frequency comparator.
— Ground
Pin Description