Philips 32PFL3406D/78 Service Manual page 61

Circuit Diagrams and PWB Layouts
Digital demodulator
Digital demodulator
B02B
+2V5_SW
5307
30R
5306 AGND AGND
30R
5304 AGND AGND
30R
DGND DGND
1301
1 3
25.4M
A G N D A G N D I307
I308
DIF_P
DGND
2339
2340
DIF_N
2377 100n
2378 100n
AGND
2336 100n
2337 100n
AGND
2338 100n
AGND
AGND AGND
DGND
+3V3_SW
3349
DGND
3337
TUNER_SCL F300 3351 100R
TUNER_SDA F301 3352 100R
DGND DGND
L11M1.1L LA 10.
I300 I301
I302 I303
AGND DGND DGND DGND
I304 I305
DGND DGND DGND
I306 DGND
7302
TC90517FG
Φ
VDDC VDDS
19 21
I FIL
X
18 58 I320
O PBVAL
3 53
0 RERR
2 XSEL
1
54
RLOCK
1u0 30
P
1u0 29 ADI_AI 55
N RSEORF
28 59
P SBYTE
27 ADQ_AI
N
52
SLOCK
24
P
25 AD_VREF 61
N SRCK
26 60
AD_VREF SRDT
39 38
DTCLK STSFLG1
I325
40 9
DTMB AGCCNTI
8 10
S_INFO AGCCNTR
10K 1 51
0 STSFLG0
41 TSMD
1
42
SYRSTN
10K 7
AGCI
6
0
I316 11 SLADRS 5
CKI 1
I317 45 12
SCL SCL
I318 46 TN 14
SDA SDA
VSS
AGND AGND
DGND DGND
EN 61
+1V25_SW
5302
30R
+3V3_SW
DGND DGND 5301
30R
+1V25_SW
DGND DGND 5303
30R
+2V5_SW
DGND DGND 5305
30R
DGND DGND
2335 1n5
AGND
3354 33R TSO_VALID
3353 33R
3357 33R TSO_SYNC
TSO_CLK
3358 33R
3359 33R TSO_DATA0
3339 20K IF_AGC
AGND
+3V3_SW
RES
F306
RESET_DEMOD
DGND
DGND
+3V3_SW
F302 FE_SCL
F303 FE_SDA
back to
2011-Jun-24
div. table
FOR DEVELOPMENT USE
DEB
DEB DEB
6301
7301 3355
BC847BW
+3V3_SW
DEB
SML-310 1K0
3356
1K0
DGND
5309
33R
4306
4307
4308 4309
4310 4311
AGND
5310 5311
I338
33R 33R
AGND DGND
PCB SB SSB
THRILLER BRZ DIG
B02B
4312
4313
4314
2 2011-01-31
1 2011-01-13
3139 123 6505
19130_018_110426.eps
110426