Hitachi C15-LC880SNT Service Manual page 26

INFORMATION OF ICS
IC GM5221 PQFP-208 (DVI Input Port)
Pin No. Pin Name
126 VDD_RX0_1.8
127 AGND_RX0
128 RX0+
129 RX0-
130 AVDD_RX0_3.3
131 AGND_RXC
132 RXC+
133 RXC-
134 AVDD_RXC_3.3
136 GND_RXPLL
137 VDD_RXPLL_1.8 Analog VDD (1.8V) for the TMDS receiver internal PLL.
138 CLK_OUT
IC GM5221 PQFP-208 (RCLK PLL Pins)
Pin No. Pin Name
165 GND_RPLL
166 VDD_RPLL_1.8
168 AGND_RPLL
169 XTAL
170 TCLK
171 AVDD_RPLL_3.3 Analog VDD (3.3V)
IC GM5221 PQFP-208 (Input Video Port)
Pin No. Pin Name
112 VCLK
111 GPIO23/VDATA0
110 GPIO22/VDATA1
109 GPIO21/VDATA2
108 GPIO20/VDATA3
107 GPIO19/VDATA4
106 GPIO18/VDATA5
103 GPIO17/VDATA6
102 GPIO16/VDATA7
VDD (1.8V) for TMDS input pair 2. Must be bypassed with external
capacitor to GND_RX0
Analog GND for TMDS input pair 0. Must be connected directly to the
analog ground plane.
TMDS input pair 0
TMDS input pair 0
Analog VDD (3.3V) for TMDS input pair 2. Must be bypassed with
capacitor to AGND_RX0
Analog GND for TMDS input clock pair. Must be connected directly to
the analog ground plane.
TMDS input clock pair
TMDS input clock pair
Analog VDD (3.3V) for TMDS input clock pair.
Must be bypassed with 100pF capacitor to AGND_RXC.
Analog GND for the TMDS receiver internal PLL.
Must be connected directly to the analog ground plane.
Must be bypassed with a capacitor to AGND_RXPLL.
Reserved, unconnected.
Digital GND for ADC clocking circuit. Must be directly connected to the
digital system ground plane.
Digital power (1.8V) for ADC digital logic. Must be bypassed with
capacitor to GND1_ADC.
Analog ground for the Reference DDS PLL. Must be directly connected
to the analog system ground plane.
Crystal oscillator output.
Reference clock (TCLK) from the 14.3MHz crystal oscillator.
Video port data clock input. Up to 75Mhz
[Input, 5V-tolerant]
Input YUV data in 8-bit BT656 or GPIO23:16 if VPORT is disabled.
[Bi-Directional, 5V-tolerant]
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Description
Description
Description