Hitachi C15-LC880SNT Service Manual page 33

INFORMATION OF ICS
IC SAA5264PS/M3/0104 SDIP52
Pin No. Pin Name
37 VSYNC
38 V
SSP
39 V
DDC
40 OSCGND
41 XTALIN
42 STALOUT
43 RESET
44 V
DDP
45
46
47
48
49 SCL
50 SDA
51
52
IC TPA1517NE DIP20
Pin No. Pin Name
1 IN1
2 SGND
3 SVRR
4 OUT1
5 PGND
6 OUT2
7 V
CC
8 M/SB
9 IN2
10-20 GND/HS
IC TVP5146PFP S-PQFP-G80 (
Pin No. Pin Name
40 DATACLK
74 XTAL1
75 XTAL2
Vertical sync pulse input; Schmitt triggered for a TTL version; the
polarity of this pulse is programmable by register bit TXT1. V POLARITY
Periphery ground
Core supply voltage (+3.3V)
Crystal oscillator ground
12 MHz crystal oscillator input
12 MHz crystal oscillator output
Reset input; if this pin is HIGH for at least 2 machine cycles (24 oscillator
periods) while the oscillator is running, the device resets; this pin
should be connected to V
Periphery supply voltage (+3.3V)
Input/output for general use
Input/output for general use
Input/output for general use
Input/output for general use
2
I C-bus Serial Clock input from application
2
I C-bus Serial Data input/output (application)
Input/output for general use
Input/output for general use
IN1 is the audio input for channel 1.
SGND is the input signal ground reference.
SVRR is the midrail bypass.
OUT1 is the audio output for channel1.
PGND is the power ground reference.
OUT2 is the audio output for channel 2.
V is the supply voltage input.
CC
M/SB is the mute/standby mode enable. When held at less than 2 V,
this signal enables the TPA1517 for standby operation. When held
between 3.5V and 8.2V,this signal enables the TPA1517 for mute
operation. When held above 9.3V, the TPA1517 operates normally.
IN2 in the audio input for channel 2.
GND/HS are the ground and heatsink connections. All GND/HS
terminals are connected directly to the mount pad for thermal-enhanced
operation.
Clock Signals
Line-locked data output clock.
External clock reference input. it may be connected to an external
oscillator with a 1.8V compatible clock signal or a 14.31818-MHz
crystal oscillator.
External clock reference output. Not connected if XTAL1 is driven by an
external single-ended oscillator.
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Description
via a capacitor
DDP
Description
)
Description