▶
tRCD
When DRAM s refreshed, both rows and columns are addressed separately. Ths
setup tem allows you to determne the tmng of the transton from RAS (row ad-
dress strobe) to CAS (column address strobe). The less the clock cycles, the faster
the DRAM performance.
▶
tRP
Ths settng controls the number of cycles for Row Address Strobe (RAS) to be
allowed to precharge. If nsufficent tme s allowed for the RAS to accumulate ts
charge before DRAM refresh, refreshng may be ncomplete and DRAM may fal
to retan data. Ths tem apples only when synchronous DRAM s nstalled n the
system.
▶
tRAS
Ths settng determnes the tme RAS takes to read from and wrte to memory cell.
▶
tRFC
Ths settng determnes the tme RFC takes to read from and wrte to a memory
cell.
▶
tWR
Mnmum tme nterval between end of wrte data burst and the start of a precharge
command. Allows sense amplfiers to restore data to cells.
▶
tWTR
Mnmum tme nterval between the end of wrte data burst and the start of a col-
umn-read command. It allows I/O gatng to overdrve sense amplfiers before read
command starts.
▶
tRRD
Specfies the actve-to-actve delay of dfferent banks.
▶
tRTP
Tme nterval between a read and a precharge command.
▶
tFAW
Ths tem s used to set the tFAW (four actvate wndow delay) tmng.
▶
tWCL
Ths tem s used to set the tWCL (Wrte CAS Latency) tmng.
▶
tCKE
Ths tem s used to set the tCKE tmng.
▶
tRTL
Ths tem s used to set the tRTL tmng.
▶
Advanced Channel 1/ 2 Tmng Configuraton
Press <Enter> to enter the sub-menu. And you can set the advanced memory tmng
for each channel.
MS-7750
3-9