Harman Kardon AVR247 Service Manual page 184

AVR247
AD0/CS 10
INT 11
RST 12
AINR- 13
AINR+ 14
AINL+ 15
AINL- 16
VQ 17
FILT+ 18
REFGND 19
AOUTA1 +,- 36,37
AOUTB1 +,- 35,34
AOUTA2 +,- 32,33
AOUTB2 +,- 31,30
AOUTA3 +,- 28,29
AOUTB3 +,- 27,26
AOUTA4 +,- 22,23
21,20
AOUTB4 +,-
VA 24
VARX 41
AGND 25
40
MUTEC 38
LPFLT 39
RXP7/GPO7 42
RXP6/GPO6 43
RXP5/GPO5 44
RXP4/GPO4 45
RXP3/GPO3 46
RXP2/GPO2 47
48
RXP1/GPO1
RXP0 49
TXP 50
VLS 53
SAI_SDOUT 54
55
RMCK
2
Address Bit 0 (I C)/Control Port Chip Select (SPI) (Input ) - AD0 is a chip address pin in I
is the chip select signal in SPI mode.
Interrupt (Output ) - The CS42528 will generate an interrupt condition as per the Interrupt Mask register.
See "Interrupts" on page 40 for more details.
Reset ( Input ) - The device enters a low power mode and all internal registers are reset to their default
settings when low.
Differential Right Channel Analog Input ( Input ) - Signals are presented differentially to the delta-sigma
modulators via the AINR+/- pins.
Differential Left Channel Analog Input ( Input ) - Signals are presented differentially to the delta-sigma
modulators via the AINL+/- pins.
Quiescent Voltage ( Output ) - Filter connection for internal quiescent reference voltage.
Positive Voltage Reference ( Output ) - Positive reference voltage for the internal sampling circuits.
Reference Ground ( Input ) - Ground reference for the internal sampling circuits.
Differential Analog Output ( Output ) - The full-scale differential analog output level is specified in the
Analog Characteristics specification table.
Analog Power ( Input ) - Positive power supply for the analog section.
Analog Ground ( Input ) - Ground reference. Should be connected to analog ground.
Mute Control ( Output ) - The Mute Control pin outputs high impedance following an initial power-on con-
dition or whenever the PDN bit is set to a '1', forcing the codec into power-down mode. The signal will
remain in a high impedance state as long as the part is in power-down mode. The Mute Control pin goes
to the selected "active" state during reset, muting, or if the master clock to left/right clock frequency ratio
is incorrect. This pin is intended to be used as a control for external mute circuits to prevent the clicks
and pops that can occur in any single supply system. The use of external mute circuits are not manda-
tory but may be desired for designs requiring the absolute minimum in extraneous clicks and pops.
PLL Loop Filter ( Output ) - An RC network should be connected between this pin and ground.
S/PDIF Receiver Input/ General Purpose Output ( Input/Output ) - Receiver inputs for S/PDIF encoded
data. The CS42528 has an internal 8:2 multiplexer to select the active receiver port, according to the
Receiver Mode Control 2 register. These pins can also be configured as general purpose output pins,
ADC Overflow indicators or Mute Control outputs according to the RXP/General Purpose Pin Control
registers.
S/PDIF Receiver Input ( Input ) - Dedicated receiver input for S/PDIF encoded data.
S/PDIF Transmitter Output ( Output ) - S/PDIF encoded data output, mapped directly from one of the
receiver inputs as indicated by the Receiver Mode Control 2 register.
Serial Port Interface Power ( Input ) - Determines the required signal level for the serial port interfaces.
Serial Audio Interface Serial Data Output ( Output ) - Output for two's complement serial audio PCM
data from the S/PDIF incoming stream. This pin can also be configured to transmit the output of the inter-
nal and external ADCs.
Recovered Master Clock ( Output ) - Recovered master clock output from the External Clock Reference
(OMCK, pin 59) or the PLL which is locked to the incoming S/PDIF stream or CX_LRCK.
184
harman/kardon
CS42528
2
C mode; CS