Abit IT5A User Manual page 64

B-4
Pentium 200MHz
CPU
Speed
P54CS
P54CS
P54CS 200 MHz Q0951F 200MHz
P54CS
P55C
Pentium 233MHz
CPU
Speed
P55C 233MHz SL2BM 233MHz
Y Bus Factor
Power STD
VR
VRE 3.450V~3.6V (Recommended voltage is 3.52V)
Timing STD
MD
Kit
P54C
1. Beginning with the P54C E-Step, standard timings have been replaced by
existing Min Delay timing
P54CS
1. P54CS PPGA UP: No DP, No APIC, No FRC
2. Beginning with the P54C E-Step, standard timings have been replaced by
existing Min Delay timing.
P55C
1. P55C A-Step is NOT production stepping
2. A-1 step:
3. A-2 Step and B step: Vcc and timing on production stepping is 2.8V +/- 0.1V
CPU Internal Bus
Spec Clock Factor
Q0951 200MHz 3
SY045 200MHz 3
3
SY044 200MHz 3
Q018 200MHz 3
CPU Internal Bus
Speed Clock Factor
3.15V~3.465V (Recommended voltage is 3.38V)
3.300V~3.465V (Recommended voltage is 3.38V)
Standard Timing
Min. Delay (denoting shorter minimum valid delay AC
timing for some signal)
Supports timing for C55/C88 cache chipsets & design
.
Vcc and timing on initial samples is 2.9V +/- 0.1V
External Power
Clock Vcore VIO
66MHz VRE
66MHz VRE
66MHz VRE
66MHz VRE
66MHz 2.8V 3.3V
External
Clock Vcore
3.5 66MHz 2.8V
Appendix B
CPU DP
Timing Supp. Note
No PPGA up
Kit No PPGA up
Kit Yes
Yes
CPU DIP
VIO Timing Supp
3.3V
PPGA
PPGA
PPGA
Note
PPGA