ECS L4S8M10 Manual page 44

UR2 Duplex Mode (Half)
This field is available when UART 2 Mode is set to either ASKIR or IrDA. This
item enables you to determine the infrared function of the onboard infrared
chip. The options are Full and Half (default).
Full-duplex means that you can transmit and send information simultaneously.
Half-duplex is the transmission of data in both directions, but only one direc-
tion at a time.
Onboard Parallel Port (378/IRQ7)
This option is used to assign the I/O address and interrupt request (IRQ) for
the onboard parallel port.
Parallel Port Mode (ECP)
Enables you to set the data transfer protocol for your parallel port. There are
four options: SPP (Standard Parallel Port), EPP (Enhanced Parallel Port),
ECP (Extended Capabilities Port) and ECP+EPP.
SPP allows data output only. Extended Capabilities Port (ECP) and Enhanced
Parallel Port (EPP) are bi-directional modes, allowing both data input and output.
ECP and EPP modes are only supported with EPP- and ECP-aware peripherals.
ECP Mode Use DMA (3)
When the onboard parallel port is set to ECP mode, the parallel port can use
DMA 3 or DMA 1.
Press <Esc> to return to the Integrated Peripherals screen.
Onboard LAN (Enabled)
Use this item to enable and disable the onboard LAN function.
Onboard LAN Boot ROM (Disabled)
Use this item to enable and disable the booting from the onboard LAN or a
network add-in card with a remote boot ROM installed.
IDE HDD Block Mode (Enabled)
Enable this field if your IDE hard drive supports block mode. Block mode en-
ables BIOS to automatically detect the optimal number of block read and
writes per sector that the drive can support. It also improves the speed of ac-
cess to IDE devices.
Init Display First (PCI Slot)
Use this item to specify whether your graphics adapter is installed in one of
the PCI slots or is integrated on the mainboard.
IDECH0/IDECH1 Access Interface (EDB BUS)
This item determines whether the IDE access interface is the PCI bus or the
embedded bus.
USB0/USB1/USB2/USB2.0 Access Interface (EDB BUS)
This option determines whether the USB0/USB1/USB2/USB2.0 access inter-
face is the embedded bus or the PCI bus.
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