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3.10.2.3 PCI
PCI
PCI or Peripheral Component Interconnect is a 32-bit bus that
Enabled (Default)
can run at clock speeds of 33 MHz. This parameter monitors the
Disabled
activity of this bus when set to enabled.
3.10.3 Event Process
3.10.3.1 Action After Critical Event
Action
After
This parameter allows you to select the action after BIOS finds a
Critical Event
critical event. The critical events include multiple bits ECC error
NMI (Default)
and PCI device error.
Power Cycle
Reset
3.10.3.2 POST Error Stop
Post Error Stop
BIOS checking the bad CPUs and memory modules during
Enabled (Default)
POST. When this parameter is enabled, BIOS will stop POST
Disabled
operation whenever it finds a bad CPU or memory. Otherwise, if
disabled the system will continue running.
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