Event Process - AOpen Fortress 9500 User Manual

Table of Contents

Advertisement

F
o
r
t
r
e
s
s
9
5
0
0
/
9
F
o
r
t
r
e
s
s
9
5
0
0
/
9
3.10.2.3 PCI
PCI
PCI or Peripheral Component Interconnect is a 32-bit bus that
can run at clock speeds of 33 MHz. This parameter monitors the
Enabled (Default)
activity of this bus when set to enabled.
Disabled

3.10.3 Event Process

3.10.3.1 Action After Critical Event
Action After
This parameter allows you to select the action after BIOS finds a
Critical Event
critical event. The critical events include multiple bits ECC error
and PCI device error.
NMI (Default)
Power Cycle
Reset
3
0
0
3
0
0
155
O
n
l
i
n
e
M
a
n
u
a
l
O
n
l
i
n
e
M
a
n
u
a
l
A
Open

Advertisement

Table of Contents
loading

This manual is also suitable for:

Fortress 9300

Table of Contents