Specification Clarifications - Intel D850MVSE Specification

SPECIFICATION CLARIFICATIONS

The Specification Clarifications listed in this section apply to the Desktop Board D850MV Technical Product
Specification (Order Number A65145). All Specification Clarifications will be incorporated into a future
version of that specification.
1. Change to Description of Section 2.6, Interrupts
Section 2.6, Interrupts, will change in its entirety as follows:
2.6 Interrupts
The Interrupts can go through either the Programmable Interrupt Controller (PIC) or the Advanced
Programmable Interrupt Controller (APIC) portion of the Intel
Windows* 98 SE and Windows ME and uses the first 16 interrupts. The APIC is supported in Windows 2000
and Windows XP and support a total of 24 interrupts.
Table 17. Interrupts
IRQ System Resource
NMI I/O channel check
0 Reserved, interval timer
1 Reserved, keyboard buffer full
2 Reserved, cascade interrupt from slave PIC
3
COM2
4
COM1
5 LPT2 (Plug and Play option) / User available
6 Diskette drive
7
LPT1
8 Real-time clock
9 Reserved for Intel ICH2 system management bus
10 User available
11 User available
12 Onboard mouse port (if present, else user available)
13 Reserved, math coprocessor
14 Primary IDE (if present, else user available)
15 Secondary IDE (if present, else user available)
16
AGP video (through PIRQA)
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Intel Desktop Board D850MV Specification Update
®
ICH2 component. The PIC is supported in
(Note 1)
(Note 1)
(Note 1)
(Note 2)
continued
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