HP 8560A Service Manual page 387

15. Measure the signals at the following test points with an active probe/spectrum analyzer
combination such as an HP 85024A/HP 8566A/B. The signal level at TP701 should be
sufficient to drive an ECL input.
TP506
TP503
TP502
TP701
16. If an approximately 10 MHz TTL signal is present at U504 pin 11, and the RF portion of
the phase-lock loop is functioning, the fault probably lies in the Phase/Frequency Detector
or the 600 MHz Reference Loop Amplifier.
17. Monitor U504 pins 5 and 9 with an oscilloscope. These are the two outputs of the
Phase/Frequency Detector. Refer to function block 0 of Al5 RF Schematic (sheet 2 of 3).
A locked loop will exhibit stable, narrow (approximately 20 ps wide), and positive-going
18.
TTL pulses occurring at a 10 MHz rate at U504 pins 5 and 9.
19. If the loop is unlocked, but signals are present on both inputs of the Phase/Frequency
Detector, the outputs pulses will be superimposed on each other.
20. If the loop is unlocked, and there is no signal at one of the Phase/Frequency Detector
inputs, one phase detector output will be at TTL low and the other will be at TTL high.
For example, if there is no input signal at U504 pin 3, U504 pin 5 will be TTL low and
be TTL low and U504 pin 5 will be TTL high.
21. To remove the 10 MHz reference input to the Phase/Frequency Detector, press (AUXCTRL),
REAR PANEL, and 10 MHz EXT with no signal applied to the rear-panel 10 MHz REF
IN/OUT connector.
22. To remove the divided-down 600 MHz signal from the Phase/Frequency Detector, remove
C519 from X501. Refer to Function Block W of Al5 RF Schematic (sheet 2 of 3).
23. Remove 10 MHz reference input to the Phase/Frequency Detector by pressing f$??iKCTRL),
REAR PANEL, and 10 MHz
REF IN/OUT connector.
Note
The outputs of Phase/Frequency Detector are low-pass filtered to reduce the
10 MHz component of the signal. The filtered signals are then integrated by
24. Check that the voltage on A15J502 pin 3 is approximately -6 Vdc. Refer to function
block P of Al5 RF Schematic (sheet 2 of 3).
25. Press (mCTRL), REAR PANEL, and 10 MHz INT and remove the divided-down 600 MHz
input to the phase/frequency detector by removing C519 from X501.
26. Check that the voltage on A15J502 pin 3 is approximately 7 Volts.
27. Replace C519 in X501.
28. If the loop is locked, the voltage on A15J502 pin 3 should be between 0 V and +5.75 Vdc.
50 MHz, >+3 dBm
300 MHz,>+3 dBm
300 MHz, approximately +8 dBm
300 MHz (ECL level), approximately +3 dBm
600
MHz
No signal should be connected to the rear-panel 10 MHz
EXT.
Synthesizer Section lo-43