TYAN S7010 User Manual page 79

Intel 5520 (36d/24d) and intel 82801jir ich10/r chipsets
Table of Contents

Advertisement

3.6.1 CPU Bridge Configuration Sub-Menu
This menu gives options for customizing CPU Bridge Chipset settings. Select a
menu by highlighting it using the Arrow (/) keys and pressing Enter. The
settings are described on the following pages.
Main
CPU Bridge Chipset Configuration
CPU Revision
Current QPI Frequency
Current Memory Frequency
QPI Frequency
QPI L0s and L2
Memory Frequency
Memory Mode
Demand Scrubbing
Patrol Scrubbing
Feature
North Bridge Chipset Configuration
CPU Revision
Current QPI Frequency
Current Memory Frequency
QPI Frequency
QPI L0s and L1
Memory Frequency
Memory Mode
Demand Scrubbing
Patrol Scrubbing
BIOS Setup Utility
Advanced
PCI/PnP
Force DDR-800
Force DDR-1066
Force DDR-1333
Channel Mirroring
http://www.tyan.com
Boot
Security
xx
x.xxx GT
x.xxx GT
[Auto]
[Disabled]
[Auto]
[Independent]
[Disabled]
[Disabled]
Option
Read only
Auto
4.800 GT
5.866 GT
6.400 GT
Disabled
Enabled
Auto
Independent
Lockstep
Sparing
Disabled
Enabled
Disabled
Enabled
79
Chipset
Transition the links to the
specified speed when
transitioning the links to
full-speed. (if supported by
all components)
← → Select Screen
↑↓ Select Item
Enter Go to Sub Screen
F1
General Help
F10 Save and Exit
ESC Exit
Description
Transition the links to the specified
speed when transitioning the links
to full-speed. (if supported by all
components)
Enable/disable L0s and L1
Force a DDR frequency slower
than the command tCK detected
via SPD
Independent: independent channel
Mirroring: mirrors channel space
between channels
Lockstep: lockstep between
channel 0 and 1
Spare: sparing mode
ECC demand scrubbing enabled /
disabled
ECC patrol scrubbing enabled /
disabled
Exit

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents