Display centering and stretching features for optimal fit of V(iA graphics and text on 800x600
and 1024x768 panels
Simultaneous Hardware Cursor and Pop-up Window
64x64 pixels by 4 colors
128x128 pixels by 2 colors
Game Acceleration
Source Transparent BLT
Destination Transparent BLT
Double buffer support for YUV and 15/16bpp Overlay Engine
Instant Full Screen Page Flip
Read back of CRT Scan line counters
Optimized for High-Performance Flat Panel Display at 3.3V
640x480 x 24bpp
800x600 x 24bpp
1024x768 x 24bpp
1280 x 1024 x 24bpp
36-bit direct interface to color and monochrome, single drive (SS), and dual drive (DD), STN &
TFT panels
Flexible On-chip Activity Timer facilitates ordered shutdown of the display system
Advanced Power Management feature minimizes power usage in:
Normal operation
Standby (Sleep) modes
Panel-Off Power-Saving Mode
VESA Standards supported
VAFC Port for display of "Live" Video
DPMS for CRT power-down (required for support of EPA Energy-Star program)
DDC for CRT Plug-Play & Display Control
Composite NTSC / PAL Support
Flicker Reduction Circuitry
Power Sequencing control outputs regulate application of bias voltage, +5V to the panel and
+12V to the inverter for backlight operation
3.3V Operation, 5.0V tolerant 1/O
Fully Compatible with IBM VGA
2-58
Service Guide