Chipset - Asus P5GDC-V Deluxe User Manual

4.4.5 4.4.5

Chipset

Chipset
4.4.5 4.4.5 4.4.5 Chipset Chipset Chipset
The Chipset menu allows you to change the advanced chipset settings.
Select an item then press <Enter> to display the sub-menu.
Advanced Chipset Settings
Configure DRAM Timing by SPD
Graphic Adapter Priority
Internal Graphics Mode Select
Fixed Graphic Memory Size
DVMT Graphic Memory Size
PEG Buffer Length
Link Latency
PEG Root Control
Slot Power
Advanced Chipset Settings Advanced Chipset Settings
Advanced Chipset Settings Advanced Chipset Settings Advanced Chipset Settings
Configure DRAM Timing by SPD [Enabled] Configure DRAM Timing by SPD [Enabled]
Configure DRAM Timing by SPD [Enabled] Configure DRAM Timing by SPD [Enabled] Configure DRAM Timing by SPD [Enabled]
When this item is enabled, the DRAM timing parameters are set according
to the DRAM SPD (Serial Presence Detect). When disabled, you can
manually set the DRAM timing parameters through the DRAM sub-items.
Configuration options: [Disabled] [Enabled]
The following sub-items appear when this item is Disabled.
DRAM CAS# Latency [3 Clocks]
Controls the latency between the SDRAM read command and the time
the data actually becomes available.
Configuration options: [3 Clocks] [2.5 Clocks] [2 Clocks]
DRAM RAS# Precharge [4 Clocks]
Controls the idle clocks after issuing a precharge command to the DDR
SDRAM. Configuration options: [2 Clocks] [3 Clocks] [4 Clocks]
[5 Clocks]
DRAM RAS# to CAS# Delay [4 Clocks]
Controls the latency between the DDR SDRAM active command and
the read/write command. Configuration options: [2 Clocks] [3 Clocks]
[4 Clocks] [5 Clocks]
DRAM RAS# Activate to Precharge Delay [15 Clocks]
Configuration options: [4 Clocks] [5 Clocks] ~ [15 Clocks]
DRAM Write Recovery Time [4 Clocks]
Sets the DRAM write recovery time.
Configuration options: [2 Clocks] ~ [5 Clocks]
A S U S P 5 G D C - V D e l u x e A S U S P 5 G D C - V D e l u x e
A S U S P 5 G D C - V D e l u x e A S U S P 5 G D C - V D e l u x e A S U S P 5 G D C - V D e l u x e
[Enabled]
[PCI Express/Int-VGA]
[Enabled, 8 MB]
[32 MB]
[32 MB]
[Auto]
[Auto]
[Auto]
[Auto]
Enable or disable
DRAM timing.
4 - 2 5 4 - 2 5
4 - 2 5 4 - 2 5 4 - 2 5