Dma Channel Controllers - HP Vectra XE310 Technical Reference Manual

BIOS Overview
I/O Address Ports
0000 - 000F
0020 - 0021
002E - 002F
0040 - 0043
0060, 0064
0061
0070
0070 - 0071
0080
0081 - 0083, 008F
0092
00A0 - 00A1
00C0 - 00DF
00F0 - 00FF
0170 - 0177
01F0 - 01F7
0278 - 027F
02E8 - 02EF
02F8 - 02FF
0372 - 0377
0378 - 037A
03B0 - 03DF
03E8 - 03EF
03F0h- 03F5
03F6
03F7
03F8 - 03FF
04D0 - 04D1
0678 - 067B
0778 - 077B
0CF8 - 0CFF

DMA Channel Controllers

Only "I/O-to-memory" and "memory-to-I/O" transfers are allowed. "I/O-to-I/O" and "memory-to-memory"
transfers are disallowed by the hardware configuration.
The system controller supports seven DMA channels, each with a page register used to extend the
addressing range of the channel to 16 MB. The following table summarizes how the DMA channels are
allocated.
30 product description
Function
DMA controller 1
Master interrupt controller (8259)
NS364 Configuration registers
Timer 1
Keyboard controller (reset, slow A20)
Port B (speaker, NMI status and control)
Bit 7: NMI mask register
RTC and CMOS data
Manufacturing port (POST card)
DMA low page register
PS/2 reset and Fast A20
Slave interrupt controller
DMA controller 2
Co-processor error
IDE secondary channel
IDE primary channel
LPT 2
Serial port 4 (COM4)
Serial port 2 (COM2)
IDE secondary channel, secondary floppy disk drive
LPT1
VGA
COM3
Floppy disk drive controller
IDE primary channel
Floppy disk drive controller
COM1
Interrupt edge/level control
LPT2 ECP
LPT1 ECP
PCI configuration space