Chip Sets
The Intel 440ZX AGPset (VEi 8, VLi 8 and VLi 8SF PCs)
The Intel 440ZX AGPset is used in conjunction with either a Socket 370
Celeron, a Pentium II or a Pentium III processor depending on the
model of PC. For information on the various configurations available,
refer to the Technical Reference Manual - Product Line Overview.
The 440ZX chip set is derived from and has the same benchmarks as
the 440BX. The only differences in features are:
512MB of RAM supported instead of 1GB on the 440BX
•
One less PCI master
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No ECC memory support.
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The Intel 440ZX AGPset is comprised of two chips: the 440ZX PAC
(PCI AGP Controller) chip and the PIIX4E chip.
The PAC chip (440ZX) is the bridge between four buses: the
•
Processor Local Bus (GTL+, also referred to as the Host, or Front
Side Bus), the main memory bus, the PCI bus and the AGP
(graphics) bus.
The PIIX4E chip is the bridge between three buses: the PCI bus, the
•
SM bus and the ISA bus. In addition, it contains the IDE controller,
USB controller and Power Management logic.
The Intel 440ZX AGPset is contained in a Ball Grid Array (BGA)
package, giving a smaller footprint and higher reliability.
The two chips that make up the Intel 440ZX AGPset are explained
below:
Intel 440ZX PAC Chip
The 440ZX PAC chip integrates a Host-to-PCI bridge, optimized DRAM
controller and data path, and an Accelerated Graphics Port (AGP)
interface. AGP is a high performance, component level interconnect,
targeted at 3D graphics applications.
Core Components and Technologies
Chip Sets
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