Samsung DVD-812 Service Manual page 67

Circuit Descriptions
5-7-2 NTSC/PAL Digital Encoder (ZIVA-4.1 ; Buit in video encode)
ZIC1 inputted from pin 159 with 27MHz generates HSYNC and VSYNC which are based on video signal.
ZIC1 is synchronous signals with decoded video signal and control the output timing of 8bit video signal of ITU-
R601 format.
The inputted 8bit data which decoded from video decoder block is demuxed with each 8bit of R, G, B.
The separate signal is encoded to NTSC/PAL by control of MIC1.
The above signals, which are CVBS(Composite Video Burst Synchronized)/G(GREEN)/Y[PIN139],
Y(S_VIDEO)/B(BRUE)/Pb[PIN145] and C(S_VIDEO)/R(RED)/Pr[PIN151], are selectively outputted CVBS
+S_VIDEO, R, G, B by the rear switch.
In Course of encoding,8bit data can extend to 10bit or more. To convert the extended data to quantization noise as
possible,ZIC1 adopts 10bit D/A converter. ZIC1 perform video en-coding as well as copy protection.
5-7-3 Amplifier (VIC1, VIC2 : BA7660)
VIC1 and VIC2 are 6dB amplifier. Based on CVBS signal, the final output level must be 2Vpp without 75ohm ter-
minal resitance. Because the level of video encoder output is only 1.1Vpp, the level is adjusted with the special
amplifier. When mute of pin 1 is high active, if the pin is floating and connecte to power, the output isgnal is
never outputted. CVBS, Y, C, R, G, B outputted from video encoder are inputted to VIC1 (Pin 7,Pin2,Pin4), and
VIC2 (Pin 7,Pin 4,Pin 2) respectively and outputted from VIC1 (Pin 15, Pin1 3, Pin 10) and VIC2 (Pin 15,Pin 13,
Pin 10). Pin 9, Pin 12, Pin 14 of VIC1, VIC2 are feedback pin to SAG compensation (DC characteristic compensa-
tion of siganl).
The signal to which gain is adjusted by amplifier is outputted from jack via 75ohm Resistance (VR10~VR13,
VR22~24).
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