Appendix A
A.1.1 Main Controller Board (C205 MAIN Board)
Pin No.
1,39,72
2
3
4
5
6
7
8
9
10,30,59
11,29,46,48,66,71 NC
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
31
32
33
34
35
36
37
38
40
41
42
43
44
45
47
49
A-4
Table A-2. CN1 and 6 Pin Assignments
Signal Name
Vss
DQ0
DQ16
DQ1
DQ17
DQ2
DQ18
DQ3
DQ19
Vcc
A0
A1
A2
A3
A4
A5
A6
A10
DQ4
DQ20
DQ5
DQ21
DQ6
DQ22
DQ7
DQ23
A7
A8
A9
RAS3
RAS2
MP2
MP0
MP1
MP3
CAS0
CAS2
CAS3
CAS1
RAS0
RAS1
WE
DQ8
EPL-N1200 Service Manual
I/O
Description
—
Ground
I/O
Data bus bit 0
I/O
Data bus bit 16
I/O
Data bus bit 1
I/O
Data bus bit 17
I/O
Data bus bit 2
I/O
Data bus bit 18
I/O
Data bus bit 3
I/O
Data bus bit 19
—
+5 VDC
—
Not connected
O
Memory address bit 0
O
Memory address bit 1
O
Memory address bit 2
O
Memory address bit 3
O
Memory address bit 4
O
Memory address bit 5
O
Memory address bit 6
O
Memory address bit 10
I/O
Data bus bit 4
I/O
Data bus bit 20
I/O
Data bus bit 5
I/O
Data bus bit 21
I/O
Data bus bit 6
I/O
Data bus bit 22
I/O
Data bus bit 7
I/O
Data bus bit 23
O
Memory address bit 7
O
Memory address bit 8
O
Memory address bit 9
O
RAS 3
O
RAS 2
—
Not used
—
Not used
—
Not used
—
Not used
O
CAS 0
O
CAS 2
O
CAS 3
O
CAS 1
O
RAS 0
O
RAS 1
O
Write enable
I/O
Data bus bit 8
Rev. A