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The stack is located at memory locations $0100-$01FF. The stack pointer is an 8-bit register
which serves as an offset from $0100. The stack works top-down, so when a byte is pushed
on to the stack, the stack pointer is decremented and when a byte is pulled from the stack,
the stack pointer is incremented. There is no detection of stack overflow and the stack
pointer will just wrap around from $00 to $FF.
2.3.3 Accumulator (A)
The accumulator is an 8-bit register which stores the results of arithmetic and logic
operations. The accumulator can also be set to a value retrieved from memory.
2.3.4 Index Register X (X)
The X register is an 8-bit register typically used as a counter or an offset for certain
addressing modes. The X register can be set to a value retrieved from memory and can be
used to get or set the value of the stack pointer.
2.2.5 Index Register Y (Y)
The Y register is an 8-bit register which is used in the same way as the X register, as a
counter or to store an offset. Unlike the X register, the Y register cannot affect the stack
pointer.
2.3.6 Processor Status (P)
The status register contains a number of single bit flags which are set or cleared when
instructions are executed.
Carry Flag (C) - The carry flag is set if the last instruction resulted in an overflow from bit
7 or an underflow from bit 0. For example performing 255 + 1 would result in an answer
of 0 with the carry bit set. This allows the system to perform calculations on numbers
longer than 8-bits by performing the calculation on the first byte, storing the carry and
then using that carry when performing the calculation on the second byte. The carry flag
can be set by the SEC (Set Carry Flag) instruction and cleared by the CLC (Clear Carry
Flag) instruction.
Zero Flag (Z) - The zero flag is set if the result of the last instruction was zero. So for
example 128 - 127 does not set the zero flag, whereas 128 - 128 does.
Interrupt Disable (I) - The interrupt disable flag can be used to prevent the system
responding to IRQs. It is set by the SEI (Set Interrupt Disable) instruction and IRQs will
then be ignored until execution of a CLI (Clear Interrupt Disable) instruction.
Decimal Mode (D) - The decimal mode flag is used to switch the 6502 into BCD mode.
However the 2A03 does not support BCD mode so although the flag can be set, its value
will be ignored. This flag can be set SED (Set Decimal Flag) instruction and cleared by
CLD (Clear Decimal Flag).
Break Command (B) - The break command flag is used to indicate that a BRK (Break)
instruction has been executed, causing an IRQ.
Overflow Flag (V) - The overflow flag is set if an invalid two's complement result was
obtained by the previous instruction. This means that a negative result has been obtained
when a positive one was expected or vice versa. For example, adding two positive
numbers should give a positive answer. However 64 + 64 gives the result -128 due to the
sign bit. Therefore the overflow flag would be set. The overflow flag is determined by
taking the exclusive-or of the carry from between bits 6 and 7 and between bit 7 and the
carry flag [29]. An explanation of two's complement can be found in Appendix A.
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