Overall Block Diagram (1/8) - Sony Handycam HDR-HC5 Service Manual

3-2. OVERALL BLOCK DIAGRAM (2/8)
HC5/HC5E
OVERALL (1/8)
(PAGE 3-1)
HC7/HC7E
OVERALL (1/8)
(PAGE 3-1)
A : VIDEO SIGNAL
HC5/HC5E
OVERALL (1/8)
(PAGE 3-1)
HC7/HC7E
OVERALL (1/8)
(PAGE 3-1)
FP-648 FLEXIBLE BOARD (2/4)
HC7/HC7E
OVERALL (1/8)
(PAGE 3-1)
HC5/HC5E
OVERALL (1/8)
(PAGE 3-1)
HC7/HC7E
OVERALL (1/8)
(PAGE 3-1)
HC5/HC5E
OVERALL (1/8)
(PAGE 3-1)
HC7/HC7E
OVERALL (1/8)
(PAGE 3-1)
HC7/HC7E
OVERALL (1/8)
(PAGE 3-1)
05
HDR-HC5/HC5E/HC7/HC7E_L2
VC-500 BOARD (1/7)
CN1201
DRVOUT1, DCOUT1, DRVOUT4, DCOUT4
DRVOUT3, DCOUT3, DRVOUT6, DCOUT6
1
DRVOUT2, DCOUT2, DRVOUT5, DCOUT5
CHCK2_4M
14
DRVOUT4, DCOUT4, DRVOUT8, DCOUT8
DRVOUT3, DCOUT3, DRVOUT7, DCOUT7
CHCK
3
DRVOUT2, DCOUT2, DRVOUT6, DCOUT6
DRVOUT1, DCOUT1, DRVOUT5, DCOUT5
CHCK3_6M
25
TGHD, TGVD
XSYS_RST
30
2
AHS_SO, AHS_SCK, XCS_AHS
YAW_AD YAW_AD
4
33
PITCH_AD PITCH_AD
34
VST_C_RESET VST_C_RESET
32
CN1010
(1/3)
IR_NOISE
30
7
ND_NOISE
33
PNDCK
10
CAM_VD
27
5
CAM_SI, CAM_SO, XCAM_SCK
XCS_IC_5404
38
XRST_IC_5404
8 40
EN1, DIRA1, DIRB1 EN1, DIRA1, DIRB1
NF_EN, NF_SW
LENS_TEMP_AD
34
CAM_EN0,
6
EN0, DIRA0, DIRB0 CAM_DIRA0, CAM_DIRB0
LENS_COVER_OPEN
29
10
THERM
37
XRST_IC_5703_CPU
41
XDS_RESET
39
DSCK_IC_5703
17
9
VST_C_RESET VST_C_RESET
44
PITCH_AD PITCH_AD
43
YAW_AD YAW_AD
42
( ) : Number in parenthesis ( ) indicates the division number of schematic diagram where the component is located.
AD0_0 - AD0_13
AD2_0 - AD2_13
AD1_0 - AD1_13
ADC_SO, ADC_SCK, XCS_ADC0
IC1201
CDS,
CLPOB
A/D H5
CONVERTER
ADC_TGHD, ADC_TGVD
(1/20)
XSYS_RST
D6
CAM_VD_HS
D7
CHCK
K5
AD1_0 - AD1_13
AD3_0 - AD3_13
ADC_SO, ADC_SCK, XCS_ADC0
IC1301
CDS,
CLPOB
A/D H5
CONVERTER
ADC_TGHD, ADC_TGVD
(2/20)
XSYS_RST
D6
CAM_VD_HS
D7
CHCK
K5
A_2.8V
X1701
IC1701
80.9191 MHz : HC5 1 5
62.3700 MHz : HC5E CLOCK
89.010989 MHz : HC7 GENERATOR
74.25000 MHz : HC7E (3/20)
XCS_IC_1702_BUS
TG_FLD
J1
D13
IC_1702_BUS_CLK
CAM_VD_HS
K1
D7
CAM_VD
A7
D24A00_CAM - D31A07_CAM,
DXXA08_CAM - DXXA13_CAM
P20
F2
XSYS_RST
F4
CAM_SI, CAM_SO, XCAM_SCK
ZOOM_SW_AD
M22
SIRCS_SIG
C22 IC1801
A10
NTSC/XPAL_DET
B14
A17
CAMERA
SYS_V
CONTROL B8
(16/20)
XSLOWSHUT_NR
B13
R22
HI_SI, HI_SO, XHI_SCK
XCS_CAMERA
AC6
B5
C1
X1801
20MHz
D1
F23
XCS_EEP_C
IC1802
F1 1
PITCH_AD
P22
128k EEPROM
(16/20)
YAW_AD
P23
EEP_SI_C,
VST_C_RESET
T2 EEP_SO_C,
EEP_SCK_C
HC5/HC5E
3-2
HDI_Y0 - HDI_Y7
HDI_C0 - HDI_C7
HDI_HD, HDI_VD, HDI_OE
VCK
R1
IC1702
CAMERA HC5/HC5E
SIGNAL
PROCESSOR
(3/20)
IC1902
128M SDRAM
(3/20)
A8, B9, B8, C9,
C8, D9, D8, E9,
E1, D2, D1, C2,
F2 F2 G9
C1, B2, B1, A2
SD_CK
A3
SD_XCS
A10
SD_CKE
D9
K21
SD_DQ0 - SD_DQ31
XSYS_RST
AB4
T4
SD_A0 - AD_A11, SD_BA0, SD_BA1
AHS_TGHD, AHS_TGVD
AHS_SO, AHS_SCK, AHS_XCS0
J2 J1 J8 R8, N7, R9, N8, P9, M8,
M7, L8, L2, M3, M2, P1,
N2, R1, N3, R2, E8, D7,
CHCK
D8, B9, C8, A9, C7, A8,
U1
A2, C3, A1, C2,
B1, D2, D3, E2
IC1901
256M SDRAM
PNDCK
AC11
(3/20)
EN1, DIRA1, DIRB1
HC7/HC7E
CAM_VD
AC7
CAM_VD_HS
AA6
TG_FLD
L21
AA3
AC5
F23
H22
U1
IC2101
(1/5)
BASE BAND
SIGNAL
PROCESSOR
(4/20)
H7, H8, J8, J7,
J3, J2, H3 - H1,
G3, H9, G2, G7,
G8
AE23
V22
SD_DQ0 - SD_DQ15
G8, G9, F7, F3, G1,
G2, G3, H1, H2, J3,
G7, H9, J7, H8
STROBE_ON
EXT_STROBE_ON
XSYS_RST OVERALL (8/8)
11
(PAGE 3-8)
ZOOM_SW_AD
SIRCS_SIG
NTSC/XPAL_DET
SYS_V
SYS_V
OVERALL (5/8)
12
XSLOWSHUT_NR
(PAGE 3-5)
HI_SI, HI_SO, XHI_SCK
OVERALL (6/8)
13
(PAGE 3-6)
XCS_CAMERA
HC7/HC7E
XDS_RESET OVERALL (8/8)
14
(PAGE 3-8)
DSCK_IC_5703 OVERALL (4/8)
15
(PAGE 3-4)