ASROCK P45X3 DELUXE - V1.0 User Manual page 49

Hyper Threading Technology
To enable this feature, it requires a computer system with an Intel Pentium
4 processor that supports Hyper-Threading technology and an operating
system that includes optimization for this technology, such as Microsoft
Windows ® XP. Set to [Enabled] if using Microsoft
kernel version 2.4.18 or higher. This option will be hidden if the installed
CPU does not support Hyper-Threading technology.
Intel (R) Virtualization tech.
When this option is set to [Enabled], a VMM (Virtual Machine Architecture)
can utilize the additional hardware capabilities provided by Vanderpool
Technology. This option will be hidden if the installed CPU does not support
Intel (R) Virtualization Technology.
No-Excute Memory Protection
No-Execution (NX) Memory Protection Technology is an enhancement to
the IA-32 Intel Architecture. An IA-32 processor with "No Execute (NX)
Memory Protection" can prevent data pages from being used by malicious
software to execute code. This option will be hidden if the current CPU
does not support No-Excute Memory Protection.
Intel (R) SpeedStep(tm) tech.
Intel (R) SpeedStep(tm) tech. is Intel's new power saving technology.
Processor can switch between multiple frequency and voltage points to
enable power
savings. The default value is [Auto]. Configuration options: [Auto], [Enabled]
and [Disabled]. If you install Windows
set the "Power Schemes" as "Portable/Laptop" to enable this function. If
you install Windows ® Vista
this item to [Enabled]. This item will be hidden if the current CPU does not
support Intel (R) SpeedStep(tm) tech..
Please note that enabling this function may reduce CPU voltage and lead to system
stability or compatibility issue with some power supplies. Please set this item to
[Disable] if above issue occurs.
Intel (R) C-STATE tech.
Intel (R) C-STATE tech. is achieved by making the power and thermal control
unit part of the core logic and not part of the chipset as before. Migration of the
power and thermal management flow into the processor allows us to use a
hardware coordination mechanism in which each core can request any C-state
it wishes, thus allowing for individual core savings to be maximized. The CPU
C-state is determined and entered based on the lowest common denominator
of both cores' requests, portraying a single CPU entity to the chipset power
management hardware and flows. Thus, software can manage each core
® Windows
®
XP and select [Auto], you need to
TM and want to enable this function, please set
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4 9 4 9
®
®
® XP, or Linux