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4. Development Board Setup
792833 | 2024.02.21
For more information about the FPGA board settings, refer to the Cyclone V GT FPGA
Development Board Reference Manual.
Related Information
•
Cyclone V Device Handbook: Volume 1: Device Interfaces and Integration
•
Cyclone V GT FPGA Development Board Reference Manual
4.3. Configuring the MAX V Device to Program EPCQ
It is possible to configure the FPGA from the EPCQ device. However, the MAX V design
provided with the Cyclone V GT FPGA development kit does not allow you to store a
design in the EPCQ configuration device.
To enable FPGA configuration using the EPCQ device, reconfigure the MAX V device
with the design file found at
Cyclone V GT FPGA Development
4.4. Restoring the MAX V CPLD to the Factory Settings
This section describes how to restore the original factory contents to the MAX V CPLD
on the FPGA development board. Make sure you have the Nios II EDS installed, and
perform the following steps:
1. Set the board switches to the factory default settings described in Factory Default
Switch and Jumper Settings.
2. Start the Intel Quartus Prime Programmer.
3. Click Auto Detect.
4. Click Add File for the 5M2210 MAX V device and select
\cycloneVGT_5cgtfd9ef35_fpga\factory_recovery\max5.pof
5. Turn on the Program/Configure option for the added file.
6. Click Start to download the selected configuration file to the MAX V CPLD.
Configuration is complete when the progress bar reaches 100%.
To ensure that you have the most up-to-date factory restore files and information
about this product, refer to the Cyclone V GT FPGA Development Kit page of the Intel
website.
Related Information
•
Factory Default Switch and Jumper Settings
•
Cyclone V GT FPGA Development Kit
Send Feedback
How do I access the EPCQ configuration device on the
Kit?.
on page 12
Cyclone
<install dir>\kits
.
®
V GT FPGA Development Kit User Guide
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