Kenwood DP-3010 Service Manual page 34

DP-3010
62
CIRCUIT DESCRIPTION
3) APC Signal Producing Circuit
This circuit only moves with the Main Servo where the
produced APC signal is output in Tri-state from the DMPC
pin to control the speed of the Disc Motor.
The APC Signal is the Phase Differential Information of the
N Division Signal and the X'tal Signal produced from the
Reference Frequency Signal (X'tal Division 7.35 kHz). This
Phase Differential Information is output from the DMPC
pin. Therefore. as shown in Diagram 7-17, when the
PFCK/N is delayed in reference to XFS/N, "H" level is
Output, and when faster, "L" level is output.
N Division is the data from APCG1 and G2 (set by the
SETR1 Command) and can be selected in four vaiues.
Select the most accurate value for the CLV Servo from the
operation results.
Also, XFS is a division of 2.1168 MHz by 288 times and is
controlled to within +1 with the two data outputs from
DIV+ and DIV—. DIV+ and DIV— (Output from the SPDA
pin) are the Buffer Memory Status Signals of the externa!
RAM of TC9200BF. The Disc Motor Jitter is corrected and
the most accurate conditions is taken to the Buffer here
XFS/N |
i]
| !
| !
PFCK/N | | H
| i 14
t
1
ies HiZ
DMPC Output ---— L---—~—----~
1225 Hz
; Divisi
DIV+ | olv— ion Dise Motor Revolutions
H Comparison
|
|
=
: Disc Motor Revolution will become
H
} faster.
i
i 1/288
H
| Disc Motor Revolution will become
slower
|
|
Note: DIV+ and DIV— can also be input with the SETRO Command
from the CPU.
4) Brake Cancel Signal Producing Circuit
When the DMBR Command is input from the CPU, "L"
level becomes fixed from the DMFC pin output and the
Disc Motor will be braked. After braking and the Disc
Motor revolution speed is slowed, this is detected and the
Brake Cancel Signal, BRKR ("H" level}, is emitted. The
BRKR emission condition is when the ELM Signai Period
continues for 512 periods and more than 22T (about 200
kHz) must be achieved. BRKR emission is checked through
BUSO line with the input of the STRD Read Command
from the CPU.
DP-3010
CIRCUIT DESCRIPTION
© Focus/Tracking Servo Circuit
Basically, TAS101N operates the Three-Beam Pick-up De-
tection Signal AMP and TC9201BF does ail the control of
the Focus/Tracking Servo and Tracking Search.
1) Servo Status Signa! Processor
The Servo Status Signal Processor is constructed of five
blocks, as shown in Diagram 7-18, and basically functions
as the emitter of the Focus/Tracking Servo and Tracking
Search control and status signal.
TC9201BF operates the Focus/Tracking and Tracking
Tracking Error Signal
TE Q
FE —o
Focus Error Signal
Comparator
TA8101N
RF Ripple Signal
RFRP
SBAD-—o-
Sub-beam Summing Signal
AD Converter Block
Search with the four signals, FE, TE, SBAD and RFRP, input
from TA8101N. The AD Convertion Block, as shown in Dia-
gram 7-18, takes the four signals that are input after pass-
ing through the TA8101N internal comparator and passed
through the TC9201BF interna! 5-bit Up/Down Counter,
5-bit DA Converter, which make up a demodulation ioop.
This construction is thus a Follow-up Comparison Type
5-bit AD Conversion Circuit. This AD converted data is
used for internal digital signal processing.
Control! Signal
Block Emitter
1709201 BF
To Focus/Tracking Servo,
Tracking Search Block
Operation
Processing
Block
—~ Scratch Detection
Shock Detection
Diagram 7-18 Servo Status Signal Processor Block
Construction
By using the TA8101N Comparator Output ZC1 and ZC2,
the Up/Down Counter, UD1 and UD2, controls at about
500 kHz with (10000), as the center is divided into 32
levels. Then a O~VareF {+2.2 V) voltage range is emitted
from the 5-bit DA Converter Output ZC1 and ZC2 (See Dia-
gram 7-19)
The internal digital signals processed are not the actual
data that has been AD converted but a four-sampie aver-
age data. The reason for this is that, when using a Foliow-
up Comparison AD Converter, the Up/Down Counter is
constantly moving back and forth between +1 and —1
which makes it difficult to use this data as it is. The con-
verted data also includes noise, which needs to be taken
out. This sampling method therefore takes out the high
range noise content.
Also, the Operation Processing Block receives data
through the two AD Converters and operation processes
them in the ALU (Operation Unit) and thus emits the re-
quired signals for Focus/Tracking Control.
The data calculated in the Operation Processing Block is
passed through the Level Check Block where this input
data is continuously being detected. The aquired Detec-
tion Result is transferred to the Focus/Tracking Servo and
Tracking Search Block :
In TA8101N ' In TC9201 BF
1
i 4
Internal Signal DA Converter Output
) EEE ar
AN Sas " ere 3'
omparatorinput 1 ~ 2 , .
Vv (Condensed Signal); 88 Diaitel ats
REF (11114)
(+2.2V)
= {10000)
Vv ———__—_—- - (00000)
17
{
1
1
'
Diagram 7-19 Data Division Details during AD
Conversion
63