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SL-P2000
¢ 1C302 (MN64732): Digital filter/ MASH
0
Division
("L": 32Fs, "H": 64Fs)
| V2
|
1
| Power supply terminal
BSEL
Input data bit select terminal
Pee a ("L": 16 bit, "H": 20bit)
ZFLG
za
Zero input detect output terminal
All zero detect terminal
ALLOW
po
(Not used, open)
Clock (192 Fs =8.4672 MHz)
output terminal
trex
Loe tem | tT Re]
Paw [aon [Ae [Len
L/R discriminating signal
Serial bit clock input terminal
CK192
LRPOL
SDATA
Serial data signal input terminal
[GND
terminal
Clock (384 Fs = 16.9344 MHz)
13
CK384
output terminal
Attenuation command data input
MDATA
terminal (Not used, connected
to power supply)
Attenuation command clock input
MCLK
terminal (Not used, connected
to power supply)
Attenuation command load input
terminal (Not used, connected
to power supply)
Reset terminal ("L": Active)
Input format select terminal of
serial data (Not used,
connected to power supply)
Test terminal (1) of digital filter
section
_ co
©
.
TP
=
tLe)
Division
Test terminal (2) of digital filter
section
Test signal input terminal of
digital filter section
Lch
anti-
out +"
Rch data (0) output terminal
Not used, connected to GND
Rch data (1) output terminal
Rch data (2) output terminal
Rch data (3) output terminal
Crystal oscillator terminal
(Not used, open)
External clock (F =33.8688 MHz)
input terminal
Power supply terminal
Data synchronizing signal
output terminal
Reset output terminal
Lech data (0) output terminal
Not used, connected to GND
5
[se [101 [0 frenante
youutteminat |
foe [ toe [0 feonante
@oupurieminat |
[ao [tos | 0 |rovante
eupurtemiat |
Clock input frequency select
terminal
("L": 768Fs, "H": 384 Fs)
wo
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