Biostar B250ET2 User Manual page 33

CState Pre-Wake
Disable - Sets bit 30 of POWER_CTL MSR(0x1FC) to 1 to disable the Cstate Pre-Wake.
Options: Enabled (Default) / Disabled
Package C State Limit
This item sets Package C State Limit.
Options: Auto (Default) / C0/C1 / C2 / C3 / C6 / C7 / C7S / C8 / C9 / C10 / CPU Default
CFG Lock
This item confgire MSR 0xE2[15], CFG lock bit.
Options: Enabled (Default) / Disabled
RSR
This item enables or disables Reliability Stress Restrictor (RSR) feature.
Options: Enabled (Default) / Disabled
AC Loadline
AC Loadline defined in 1/100 m0hms. A value of 100=1.00 m0hm, and 1255 =12.55 m0hm. Range
is 0-6249 (0-62.49 m0hms). 0=AUTO/HW default.
Options: Auto (Default)
DC Loadline
DC Loadline defined in 1/100 m0hms. A value of 100=1.00 m0hm, and 1255 =12.55 m0hm. Range
is 0-6249 (0-62.49 m0hms). 0=AUTO/HW default.
Options: Auto (Default)
FCLK Frequency for Early Power On
FCLK frequency can take values of 400MHz, 800MHz and 1GHz (1GHz not supported for ULT/ULX
SKUs).
Options: 1GHz (Default) / Normal (800Mhz) / 400MHz
Memory Insight
B250ET2
6. O.N.E Menu | 33