MSI P45 Neo3 Series Manual page 41

MEMORY-Z
Press <Enter> to enter the sub-menu and the following screen appears.
DIM M1~4 Memory SPD Information
Press <Enter> to enter the sub-menu and the following screen appears.
DIM M1~4 Memory SPD Information
These items display the current status of the current DIMM Memory speed
information such as memory type, max bandwidth, manufacture, part
number, serial number, SDRAM cycle time, DRAM TCL, DRAM TRCD, DRAM
TRP, DRAM TRAS, DRAM TRFC, DRAM TWR, DRAM TWTR, DRAM TRRD
and DRAM TRTP. They are read only.
CAS# Latency (CL)
This controls the CAS latency, which determines the timing delay (in clock
cycles) before SDRAM starts a read command after receiving it.
tRCD
W hen DRAM is refreshed, both rows and columns are addressed separately.
This setup item allows you to determine the timing of the transition from RAS
(row address strobe) to CAS (column address strobe). The less the clock
cycles, the faster the DRAM performance.
tRP
This setting controls the number of cycles for Row Address Strobe (RAS) to be
allowed to precharge. If insufficient time is allowed for the RAS to accumulate its
charge before DRAM refresh, refresh may be incomplete and DRAM may fail to
retain data. This item applies only when synchronous DRAM is installed in the
system.
tRAS
This setting determines the time RAS takes to read from and write to memory
cell.
1N/2N M emory Timing
This item controls the SDRAM command rate. Select [1N] makes SDRAM signal
controller to run at 1N (N=clock cycles) rate. Selecting [2N] makes SDRAM
signal controller run at 2N rate.
Advance Memory Setting
Setting to [Auto] enables the advance memory timing automatically to be
determined by BIOS. Setting to [Manual] allows you to set advanced memory
timings.
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