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BQ76905
SLUSE97 – NOVEMBER 2023
During a short circuit event, the stack voltage may be momentarily pulled to a very low voltage before the
protection FETs are disabled. In this case, the charge on the BAT pin capacitor temporarily supports the
BQ76905 device's supply current to avoid the device losing power.
The REGSRC pin serves as the supply voltage for the integrated REGOUT customer regulator and for the CHG
and DSG FET drivers. This pin can also be connected to the top of stack through a diode, to similarly allow
the voltage to hold up longer during a short circuit event. If a diode or any series resistance (> 1 Ω) is included
between the top of stack and the REGSRC pin, a minimum 1-μF capacitor is recommended to be included at the
REGSRC pin to VSS. It is also acceptable to short the REGSRC pin to the BAT pin, such that the same diode
and filter circuit can support both pins. However, the system designer should consider the load on the REGOUT
pin discharges the BAT capacitor faster in this case.
8.4 Layout
8.4.1 Layout Guidelines
•
The quality of the Kelvin connections at the sense resistor is critical. The sense resistor should have
a temperature coefficient no greater than 50 ppm in order to minimize current measurement drift with
temperature. Choose the value of the sense resistor to correspond to the available overcurrent and short-
circuit ranges of the BQ76905 device. Parallel resistors can be used as long as good Kelvin sensing is
ensured.
•
In reference to the system circuitry, the following features require attention for component placement and
layout: Differential Low-Pass Filter, and I
•
The BQ76905 device uses an integrating delta-sigma coulomb counter ADC for current measurements. For
best performance, 100-Ω resistors should be included from the sense resistor terminals to the SRP and SRN
inputs of the device, with a 0.1-μF filter capacitor placed across the SRP and SRN pins. Optional 0.1-µF filter
capacitors can be added for additional noise filtering at each sense input pin to ground. All filter components
should be placed as close as possible to the device, rather than close to the sense resistor, and the traces
from the sense resistor routed in parallel to the filter circuit. A ground plane can also be included around the
filter network to add additional noise immunity.
•
These filter components between the sense resistor and the SRP and SRN terminals provide filtering of noise
components, but they also introduce an RC time constant delay, nominally 20 µs using the two 100-Ω and
single differential 0.1-μF components. If this delay introduces too much additional time into the response of
the device to short circuit events, the filter time constant can be reduced, with the tradeoff of providing less
filtering.
2
•
The I
C clock and data pins have integrated ESD protection circuits; however, adding a Zener diode and
series resistor on each pin provides more robust ESD performance.
8.4.2 Layout Example
An example circuit layout using the BQ76905 device in a 5-series cell design is described below. The design
uses a 2.175-inch × 1.400-inch 2-layer circuit card assembly, with cell connections on the left edge, and pack
connections along the bottom edge of the board. Wide trace areas are used, reducing voltage drops on the high
current paths.
The board layout, which is shown in
designator prefix E. These spark gaps are fabricated with the board and no component is installed.
52
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2
C communication.
Figure 8-9
and
Figure
Product Folder Links:
BQ76905
8-10, includes spark gaps with the reference
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www.ti.com
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