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IC BLOCK DIAGRAM AND DESCRIPTION
AK4584VF(107dB 24-Bit 96kHz 4-Channel SDC)
AVDD
AVSS
LIN1+
∆Σ
LIN1-
Modulator
∆Σ
RIN1+
RIN1-
Modulator
∆Σ
LIN2+
Modulator
LIN2-
∆Σ
RIN2+
RIN2-
Modulator
VCOM
Voltage Reference
OVF
No. Pin Name
1
LIN2+
2
LIN2−
3
RIN2+
4
RIN2−
5
TEST
6
VCOM
7
AVSS
8
AVDD
9
DIF
10
TDM1
11
TDM0
12
TDMIN
13
MCLK
14
OVF
15
LRCK
16
BICK
17
SDTO2
18
SDTO1
19
TVDD
20
DVDD
21
DVSS
22
PDN
23
CKS
24
M/S
25
RIN1−
26
RIN1+
27
LIN1−
28
LIN1+
DVDD
DVSS
TVDD
Decimation
Filter
Decimation
Filter
Audio
Interface
Decimation
Filter
Decimation
Filter
Clock Divider
PDN
CKS
I/O
I
ADC2 Lch Positive Analog Input Pin
I
ADC2 Lch Negative Analog Input Pin
I
ADC2 Rch Positive Analog Input Pin
I
ADC2 Rch Negative Analog Input Pin
I
Test Pin
(Connected to AVSS)
Common Voltage Output Pin, AVDD/2
O
Normally connected to AVSS with a 0.1µF ceramic capacitor in parallel with an
electrolytic capacitor less than 2.2µF.
-
Analog Ground Pin
Analog Power Supply Pin, 4.75 ∼ 5.25V
-
Audio Interface Format Pin
I
"L" : 24bit MSB justified, "H" : 24bit I
TDM I/F BICK Frequency Select Pin
I
"L" : 256fs, "H" : 128fs
TDM I/F Format Enable Pin
I
"L" : Normal Mode, "H" : TDM Mode
I
TDM Data Input Pin
I
Master Clock Input Pin
Analog Input Overflow Detect Pin
O
This pin goes to "H" if one of four analog inputs overflows.
Output Channel Clock Pin
I/O
"L" Output in Master Mode at Power-down mode.
Audio Serial Data Clock Pin
I/O
"L" Output in Master Mode at Power-down mode.
ADC2 Audio Serial Data Output Pin
O
"L" Output at Power-down mode.
ADC1 Audio Serial Data Output Pin
O
"L" Output at Power-down mode.
Output Buffer Power Supply Pin, 3.0 ∼ 5.25V
-
Digital Power Supply Pin, 4.75 ∼ 5.25V
-
-
Digital Ground Pin
Power-Down Mode Pin
I
When "L", the circuit is in power-down mode.
The AK5384 should always be reset upon power-up.
Master Clock Select Pin
I
"L" : 256fs, "H" : 512fs
This pin is enabled in Master Mode.
Master / Slave Mode Pin
I
"L" : Slave Mode, "H" : Master Mode
I
ADC1 Rch Negative Analog Input Pin
I
ADC1 Rch Positive Analog Input Pin
I
ADC1 Lch Negative Analog Input Pin
I
ADC1 Lch Positive Analog Input Pin
LIN2+
1
LRCK
LIN2-
2
RIN2+
BICK
3
RIN2-
4
SDTO1
TEST
5
SDTO2
VCOM
6
AVSS
7
TDMIN
AVDD
8
M/S
DIF
9
DIF
TDM1
10
TDM0
11
TDM0
TDMIN
12
TDM1
MCLK
13
OVF
14
MCLK
Note: All digital input pins should not be left floating.
Function
2
S Compatible
TX-NR1000
28
LIN1+
LIN1-
27
RIN1+
26
RIN1-
25
M/S
24
CKS
23
PDN
22
Top View
DVSS
21
DVDD
20
TVDD
19
SDTO1
18
SDTO2
17
BICK
16
LRCK
15
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