Sony UDA-1 Service Manual page 55

• IC Pin Function Description
DIGITAL BOARD IC203 CM6632A (USB AUDIO PROCESSOR)
Pin No. Pin Name
1 XSCO
2 VCCHSRT
3 GNDHSRT
4 RREF
5 USBDM
6 USBDP
7 VCCA_U20
8 GNDA_U20
9 VCC3V
10 VCC
11 GND
12 to 17 XGPI_0 to XGPI_5
18 GND
19 XPWDN
20, 21 XD6, XD7
22 XD0
23 XD1
24 XHDA_BCLK
25 XHDA_SDI
26 XHDA_SYNC
27 XHDA_RST
28 XHDA_SDO
29 VCC3V
30 XMADC_SDIN0
31 XMADC_SCLK
32 XMADC_MCLK
33 XMADC_LRCK
34 X2ADC_SDIN
35 X2ADC_SCLK
36 X2ADC_LRCK
37 X2ADC_MCLK
38 XSPDIFO_0
39 GND
40 XSPDIFI_0
XPEE_D0 to
41 to 48
XPEE_D7
49, 50 XGPIO_2, XGPIO_3
51 XGPIO_4
52 XGPIO_5
53 VCC3V
54 XGPIO_1
55 XRSTO
56 XSSDA
57 XSSCL
58 to 60 XGPIO_6 to XGPIO_8
61 GND
62 XGPIO_9
63 XMSDA
64 XMSSCL
XPEE_A0 to
65 to 72
XPEE_A7
73 VCC3V
XPEE_A8 to
74 to 81
XPEE_A15
82 XPEE_CEN
83 XPEE_WRN
84 XPEE_RDN
I/O
O System clock output terminal (12 MHz)
- Power supply terminal (+3.3V) (analog system)
- Ground terminal (analog system)
I External reference resistor connection terminal
I/O Two-way USB serial data (–) bus with the USB connector
I/O Two-way USB serial data (+) bus with the USB connector
- Power supply terminal (+3.3V) (analog system)
- Ground terminal (analog system)
- Power supply terminal (+3.3V) (digital system)
O External fi lter capacitor connection terminal
- Ground terminal (digital system)
I/O Not used
- Ground terminal (digital system)
O Power down control signal output terminal
I System clock input terminal
I Serial data input terminal
O Serial data output terminal
O Bit clock signal output terminal
I Serial data input terminal
O Frame sync signal output terminal
O Reset signal output terminal
O Serial data output terminal
- Power supply terminal (+3.3V) (digital system)
I I2S serial data input terminal
I/O I2S bit clock signal input/output terminal
O I2S master clock signal output terminal
I/O I2S L/R sampling clock signal input/output terminal
I I2S serial data input terminal
I/O I2S bit clock signal input/output terminal
I/O I2S L/R sampling clock signal input/output terminal
O I2S master clock signal output terminal
O S/PDIF signal output terminal
- Ground terminal (digital system)
I S/PDIF signal input terminal
I/O Two-way serial data bus with the fl ash memory
I/O Not used
O DSD detection signal output to the system controller
I/O Not used
- Power supply terminal (+3.3V) (digital system)
I/O Not used
O Reset signal output terminal
I/O Two-way slave serial data bus terminal
I/O Two-way slave serial clock bus terminal
I/O Not used
- Ground terminal (digital system)
I/O Not used
I/O Two-way master serial data bus terminal
I/O Two-way master serial clock bus terminal
O Address signal output to the fl ash memory
- Power supply terminal (+3.3V) (digital system)
O Address signal output to the fl ash memory
O Chip enable signal output to the fl ash memory
O Write enable signal output to the fl ash memory
O Read enable signal output to the fl ash memory
Description
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
"L": PCM, "H": DSD
Not used
Not used
Not used
Not used
Not used
UDA-1
55