Theory Ol Operation - Radio Shack PRO-60 Service Manual

THEORY OF OPERATION
The PRO-60 is a PLL (Phase-Locked Loop) synthesized VHF/UHF, AM/FM receiver, controlled by a CPU (Central
Processing Unit) via a keyboard.
Receiving mode and search step are initially set to correspond with the Irequencies entered. When a Irequency
within the FM broadcast band is keyed in, the receiving mode is set to wideband FM (WFM). When a Irequency in
the active radio band, such as police, lire, and ham radio, is keyed in, the mode is set to narrowband FM (NFM),
and when a frequency in the aircraft band is keyed in, it sets to AM mode. The mode can also be changed by the
AM/FMIWFM key.
All lunctions, such as the receiving Irequency range, Irequency determination, scanning ar ~ delay time, etc. are
controlled by the CPU (IC1). The CPU is abIe to do only the assigned lunctions and no
me .cation ol the CPU is
leasible.
The lollowing paragraphs explain the operation ol the circuit in terms of the lunctional blocks:
Varactor (variabie capacitance diode) tuning (automatic tuning system) is employed on all bands.
The RF input circuit consists ol the bandpass lilters (BPF). A signal generated by VCOl or VC02 is applied to the
lst mixer and mixed with the RF signa!. The lst mixer is employed to lacilitate 30 MHz to 999.9875 MHz mixing.
The lst IF (0106) is 608.005 - 611.2 MHz, and the signal is mixed with VC03 Irequency at the 2nd mixer (0107)
to produce a 45 MHz signa!. Corresponding with the input lrom the keyboard, the CPU selects VCOl or VC02
and determines the AM/NFMIWFM data ol the PLL circuit that will lunetion; then it outputs the necessary data.
A signai entered to NFM/AM IF is mixed with crystal oscillation Irequency 44.545 MHz at the 3rd mixer (IC3Dl)
and converted to a 455 kHz signa!. A signal entered to WFM IF is mixed with crystal oscillation Irequency 34.3
MHz at the 3rd mixer (IC3D2) and converted to al 0.7 MHz signa!. The signal is lurther amplilied to be detected as
an AF signa!.
The AF signalol AM, NFM, and WFM is CPU-controlled and applied to the AF power amplifier (IC3D6) via a
switching circuit. Squeich signals are comprised ol noise products lrom detector output, and amplified by IC3Dl
through a switching signal, which controls the AF mute and CPU.
CXl (4.19 MHz) is a clock which controls the CPU. Figure A shows the clock wavelorm at ICl pin 58.
The unit has a battery-saving control in manual mode. When the unit is in operation, ICl pin 61 is "H" and IC3D9
is on. II there has been no signal input or no key input lor more than 5 seconds in manual mode with squelch on,
pin 61 goes "L" (Figure B), turning olf IC3D9 to shut olf the power supply lor most ol the circuits (except the CPU
and audio circuit). In this battery-saving mode, the unit uses oniy 40% ol the power required lor normal operation.
Any unstable supply voltage to the CPU can produce a CPU mallunction, such as wrong data processing, wrong
data transfer, etc. To overcome this, the CPU can be initialized when necessary. To initialize the CPU, press and
hold CLEAR and 0, and then turn on the power.
4.5V
238.6 ns
j r -
Figure A
5
sec.
Pin 61 L --_____________ _
L...--..
Figure B
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