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8
7
UM1
ARA0
AE4
AD1
ARDQM0
ARA0
ARDQM0
ARA1
AG6
AC1
ARDQS0
ARA1
ARDQS0
ARA2
AF7
AC2
ARDQS0#
ARA2
ARDQS0#
ARA3
AF4
Y2
ARDQ0
ARA3
ARDQ0
ARA4
AG5
AG2
ARDQ1
ARA4
ARDQ1
ARA5
AG7
Y1
ARDQ2
ARA5
ARDQ2
ARA6
AJ6
AG3
ARDQ3
ARA6
ARDQ3
ARA7
AJ5
W1
ARDQ4
ARA7
ARDQ4
F
ARA8
AL4
AH3
ARDQ5
ARA8
ARDQ5
ARA9
AH4
W2
ARDQ6
ARA9
ARDQ6
ARA10
AD7
AH2
ARDQ7
ARA10
ARDQ7
ARA11
AK6
ARA11
ARA12
AF6
AC3
ARDQM1
ARA12
ARDQM1
AK5
AD2
ARA13
ARDQS1
ARA13
ARDQS1
AM4
AE2
ARA14
ARDQS1#
ARA14
ARDQS1#
AF1
ARDQ8
ARDQ8
AB3
ARDQ9
ARDQ9
ARBA0
AD5
AG1
ARDQ10
ARBA0
ARDQ10
ARBA1
AE3
Y3
ARDQ11
ARBA1
ARDQ11
ARBA2
AD6
AF2
ARDQ12
ARBA2
ARDQ12
AB2
ARDQ13
ARDQ13
ARCS
AB5
AF3
ARDQ14
ARCS
ARDQ14
ARCSD
AB4
AB1
ARDQ15
ARCSD
ARDQ15
ARRAS
AA5
ARRAS
ARCAS
AA6
AN2
ARDQM2
ARCAS
ARDQM2
ARWE
AB7
AM3
ARDQS2
ARWE
ARDQS2
ARODT
AB6
AN1
ARDQS2#
ARODT
ARDQS2#
ARCKE
AA7
AK2
ARDQ16
ARCKE
ARDQ16
ARRESET#
AK4
AT2
ARDQ17
ARRESET#
ARDQ17
AK1
ARDQ18
ARDQ18
Y4
AU1
ARCLK
ARDQ19
ARCLK
ARDQ19
Y5
AJ1
ARCLK#
ARDQ20
ARCLK#
ARDQ20
AU2
ARDQ21
ARDQ21
DDRVREF_A1
V1
AJ3
ARDQ22
DDRVREF_A1
ARDQ22
DDRVREF_A2
AJ2
AR4
ARDQ23
E
DDRVREF_A2
ARDQ23
AM1
ARDQM3
ARDQM3
ARTN
W9
AP1
ARDQS3
ARTN
ARDQS3
AP2
ARDQS3#
ARDQS3#
AE10
AR2
ARDQ24
MEMTP
ARDQ24
AF10
AL2
ARDQ25
MEMTN
ARDQ25
AT1
ARDQ26
ARDQ26
AK3
ARDQ27
ARDQ27
AP3
ARDQ28
DDRV_1V5
ARDQ28
AB8
AL3
ARDQ29
DDRV
ARDQ29
AM8
ARDQ30
AR3
DDRV12
ARDQ30
AC10
AM2
ARDQ31
DDRV1
ARDQ31
AC9
DDRV2
AD10
DDRV3
AK16
G1
AVDD33_DDR
DDRV4
AVDD33_DDR
AK17
AV20
AVDD10_DDR
DDRV5
AVDD10_DDR
AJ10
AF15
AVDD10_DDR
DDRV6
AVDD10_DDR1
AJ11
DDRV7
AJ8
DDRV8
AJ9
G2
DDRV9
AVSS_DDR
AK10
AU20
DDRV10
AVSS_DDR1
AK11
AF14
DDRV11
AVSS_DDR2
Y6
DDRV_CKA
MT5658
D
VCCK_1V0
CM60
CM61
R700
AVDD10_DDR
0.1U
0R
GND
GND
Keep a trace from the GND of cap to Main chip
VCCK_1V0
RM194
AVDD10_DDR
NC/
0R
ARTN
Keep a trace from the GND of cap to Main chip AVSS_DDR
RM158
47R
Reseved on bottom side
GND
C
DDRV_1V5
DRAM#1 Bypass Cap
CD7
CD5
CD6
CD163
0.1U
0.1U
0.1U
0.1U
GND
CD167
CD168
CD148
CD170
CD164
0.1U
0.1U
0.1U
0.1U
0.1U
B
GND
DDRV_1V5
DRAM#2 Bypass Cap
CD13
CD158
CD18
CD21
0.1U
0.1U
0.1U
10U
GND
A
8
7
6
DDRV_1V5
UD1
N3
ARA0
A0
ARA1
P7
A1
ARA2
P3
A2
ARA3
N2
A3
ARA4
P8
A4
ARA5
P2
A5
ARA6
R8
A6
ARA7
R2
A7
ARA8
T8
A8
ARA9
R3
A9
ARA10
L7
A10
ARA11
R7
A11
ARA12
N7
A12
ARBA0
M2
BA0
ARBA1
N8
BA1
ARBA2
M3
BA2
ARCS
L2
/CS
ARRAS
J3
/RAS
ARCAS
K3
/CAS
ARWE
L3
/WE
ARODT
K1
ODT
A_VREFCA1
M8
VREFCA
J1
NC1
J9
NC2
L1
NC3
L9
NC4
M7
NC5
ARA13
T3
NC6
ARA14
T7
NC7
H5TQ4G63CFR
RD1
240R +/-1%
GND
DVDD3V3
R701
AVDD33_DDR
0R
1U
DDRV_1V5
RM70
ARRESET#
CM70
NC/
1U
GND
CD9
CD10
CD11
CD12
CM249
0.1U
0.1U
0.1U
0.1U
0.1U
CM52
CD166
CM255
CM250
0.1U
0.1U
0.1U
0.1U
CD22
CD23
CD24
CD25
CD159
0.1U
0.1U
0.1U
0.1U
0.1U
CD2
CD165
CD160
CD161
0.1U
0.1U
0.1U
0.1U
GND
6
5
4
D3
ARDQM1
DMU
C7
ARDQS1
DQSU
B7
ARDQS1#
/DQSU
D7
ARDQ8
DQU0
C3
ARDQ9
DQU1
C8
ARDQ10
DQU2
C2
ARDQ11
DQU3
A7
ARDQ12
DQU4
A2
ARDQ13
DQU5
B8
ARDQ14
DQU6
A3
ARDQ15
DQU7
E7
ARDQM0
DML
F3
ARDQS0
DQSL
G3
ARDQS0#
/DQSL
E3
ARDQ0
DQL0
F7
ARDQ1
DQL1
F2
ARDQ2
DQL2
F8
ARDQ3
DQL3
H3
ARDQ4
DQL4
H8
ARDQ5
DQL5
G2
ARDQ6
DQL6
H7
ARDQ7
DQL7
DDRVREF_A1
H1
VREFDQ
J7
ARCLK
CK
K7
ARCLK#
/CK
K9
ARCKE
CKE
CD60
T2
ARRESET#
/RESET
0.1U
GND
GND
NC/
47K
CM269
NC/
0.1U
Differential Clock
GND
Near Main Chip
DDR3#1 Ref Volt
3
4
5
3
2
DDRV_1V5
UD2
ARA0
N3
A0
ARA1
P7
A1
ARA2
P3
A2
ARA3
N2
A3
ARA4
P8
A4
ARA5
P2
A5
ARA6
R8
A6
ARA7
R2
A7
ARA8
T8
A8
ARA9
R3
A9
ARA10
L7
A10
ARA11
R7
A11
ARA12
N7
A12
ARBA0
M2
BA0
ARBA1
N8
BA1
ARBA2
M3
BA2
ARCSD
L2
/CS
ARRAS
J3
/RAS
ARCAS
K3
/CAS
ARWE
L3
/WE
ARODT
K1
ODT
A_VREFCA2
M8
VREFCA
J1
NC1
J9
NC2
L1
NC3
L9
NC4
M7
NC5
ARA13
T3
NC6
ARA14
T7
NC7
H5TQ4G63CFR
RD2
240R +/-1%
GND
Near DRAM
ARCLK
RD8
100R
ARCLK#
DDRV_1V5
DDR3#2 Ref Volt
DDRV_1V5
CD8
0.1U
RD16
RD18
1K +/-1%
1K +/-1%
GND
A_VREFCA1
RD20
RD22
CD15
1K +/-1%
0.1U
1K +/-1%
GND
GND
GND
Near DRAM
Near DRAM
3
2
1
D3
ARDQM3
DMU
F
C7
ARDQS3
DQSU
B7
ARDQS3#
/DQSU
D7
ARDQ24
DQU0
C3
ARDQ25
DQU1
C8
ARDQ26
DQU2
C2
ARDQ27
DQU3
A7
ARDQ28
DQU4
A2
ARDQ29
DQU5
B8
ARDQ30
DQU6
A3
ARDQ31
DQU7
E7
ARDQM2
DML
F3
ARDQS2
DQSL
G3
ARDQS2#
/DQSL
E3
ARDQ16
DQL0
F7
ARDQ17
DQL1
F2
ARDQ18
DQL2
F8
ARDQ19
DQL3
H3
ARDQ20
DQL4
H8
ARDQ21
DQL5
G2
ARDQ22
DQL6
H7
ARDQ23
DQL7
DDRVREF_A2
H1
E
VREFDQ
J7
ARCLK
CK
K7
ARCLK#
/CK
K9
ARCKE
CKE
CD61
T2
ARRESET#
/RESET
0.1U
GND
GND
D
C
CD4
0.1U
GND
A_VREFCA2
CD17
0.1U
GND
B
A
1
FORMAT DIN A2
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