Yaesu FT-901DM Maintenance Service Manual page 38

TECHNICAL NOTES
THEORY OF OPERATION
This transceiver utilizes PLL (Phase Locked Loop)
circuitry. The receiver is a single-conversion type
with a 8.9875 MHz IF. The following circuit des-
cription is tailored to the full-feature FT-901DM,
and some of the features and circuitry described
below are optional on the FT-901D/SD/DE
models.
RECEIVER
The RF input signal from the antenna is fed to pin
3 of the RF UNIT (PB-1702) via antenna relay
RL», line fuse FH; , attenuator switch S2103, input
transformer T; , and 9 MHz trap coil T2402.
RF UNIT (PB-1423)
The incoming signal is amplified by the RF ampli-
fier Qo; (3SK40M), a dual-gate MOSFET which
has superior rejection against cross modulation,
The amplified signal is then fed through a source
follower by parallel-connected Qjo2 and Qio3
(both 2SK19GR) to the balanced mixer consist-
ing of Qo, and Qyos (both 2SK19GR), where the
input signal is heterodyned with a local signal
delivered from buffer amplifier Q,og (2N4427),
producing an IF signal of 8.9875 MHz at Jo).
The input and output of the RF amplifier are
permeability tuned circuits, resulting in high
sensitivity with excellent rejection of unwanted
out-of-band signals.
2-11