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Table 4-7. Logic Analyzer Connector J13 Pin Assignments (continued)
Pin
8
9
10
11
12
13
14
15
M68MPB16Z3UM/D
Mnemonic
BR /
BUS REQUEST – Active-low input signal that indicates
an external device requires bus mastership.
CS0
CHIP SELECT 0 – Output signal that selects peripheral
or memory devices at programmed addresses.
BG /
BUS GRANT – Active-low output signal that indicates
the MCU has relinquished the bus.
CS1
CHIP SELECT 1 – Output signal that selects peripheral
or memory devices at programmed addresses.
CSBOOT
BOOT CHIP SELECT – An active-low output chip
select for external boot startup ROM
CLKOUT
SYSTEM CLOCK OUTPUT – MCU internal clock
output signal.
A23 /
ADDRESS BUS BIT 23 – One bit of the 24-bit address
bus.
CS10
CHIP SELECT 10 – Output signal that selects
peripheral or memory devices at programmed
addresses.
ECLK
EXTERNAL CLOCK – M6800 bus clock output.
A22 /
ADDRESS BUS BIT 22 – One bit of the 24-bit address
bus.
CS9
CHIP SELECT 9 – Output signal that selects peripheral
or memory devices at programmed addresses.
A21 /
ADDRESS BUS BIT 21 – One bit of the 24-bit address
bus.
CS8
CHIP SELECT 8 – Output signal that selects peripheral
or memory devices at programmed addresses.
A20 /
ADDRESS BUS BIT 20 – One bit of the 24-bit address
bus.
CS7
CHIP SELECT 7 – Output signal that selects peripheral
or memory devices at programmed addresses.
MEVB SUPPORT INFORMATION
Signal
4-7
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