Ⅱ. Inside of Peony2
Interrupt Controller
- External 5 ports supported
Timer/WDT/IRR
Clock Circuits and Power Management (reserved)
RTC(Reserved)
SSP (reserved)
- 8-bit Shift Register for transmit
- 8-bit Shift Register for receive
- 10-bit Pre-scaler logic
LAKE : S5H2111