Samsung LNT4669F Training Manual page 48

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Ⅱ. Inside of Peony2
LAKE is a single HD MPEG and Audio Decoding processing IC and was
designed to operate best in a built-in HDTV. Being a single chip that
processes the HDTV signals, this compactness allows for simple set design
GENERAL FEATURES
ARM926EJS CPU
- up to 220MHz ~ 250MHz @1.2V
- D-cache 16KB, I-cache 16KB
External Memory Interface
- DDR : Clock frequency up to 125MHz @2.5V
TS(Transport Stream) Demux Engine
- 1 parallel & 1 serial input
- ATSC format supported(3DES-CBC)
MPEG Video Decoder
- MPEG-2 MP@HL Single Decoder
Display Processor
- Digital HD video output : YCbCr(16-bit)
- ATSC 18 formats (1080i, 720p, 480p)
- Tri-state Output
Audio Decoder /Output
LAKE : S5H2111

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